SHF: Medium: PARIS: A New In-Sensor Computing Architecture for Intelligent 3-D Imaging Systems
SHF: Medium: PARIS: A New In-Sensor Computing Architecture for Intelligent 3-D Imaging Systems
批准号:
2106750
负责人:
Qing Yang
金额:
$120.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2021
资助国家:
美国
项目状态:
未结题
起止时间:
2021-07-15 至 2025-06-30
中文摘要
现在,设计和开发用于人工智能的新型计算机硬件以及具有高性能和节能计算能力的智能传感器是国家研究的重点。该项目提出了一种新的架构,巴黎(相控阵雷达与传感器内计算),同时感测和处理三维图像在真实的时间。这种新的架构模仿了人类的视觉系统,不仅可以检测和感知3D视觉图像,还可以在大脑视觉皮层进行更复杂的处理之前进行第一阶段的图像处理。它是第一个利用相控阵雷达系统的传感器内计算架构,用于节能,高性能,低成本和紧凑的传感/计算平台。通过将相控阵雷达成像和神经形态计算相结合,巴黎为传感器内计算和智能图像处理的研究开辟了一条新的途径。该项目对医疗器械、自动驾驶汽车、机器视觉、机器人控制、物联网设备、智能手机和消费电子产品等广泛行业产生了变革性影响。该项目的研究活动涉及女性和少数民族学生,加强PI目前的K-12推广活动,并加强大学所有专业的大挑战课程。众所周知,在人工智能系统中,将原始数据从传感器转移到处理元件在能源,性能和硬件方面都是非常昂贵的。新提出的架构在传感器采集数据的同时启动人工神经网络计算,大大减少了传感器和处理元件之间的数据移动。通过几项技术突破,这种同时感测和计算成为可能。1)2)一种新的统计信号采集技术,即基于抖动的模拟-概率转换,允许直接使用集成电路的数字引脚进行低开销的高带宽测量; 3)紧凑的单板系统,支持非常高的射频带宽,并完全消除了传统微波成像系统所需的射频模拟前端通过利用当今I/O接口中使用的数字波形的非常短的上升/下降沿,可以实现对数字信号(例如,模数转换器、滤波器或放大器)的高性能化。传感器内计算架构的理论和设计正在建立中,一个16节点的原型正在建造中。正在进行全面的评估和比较,以展示其性能,能源效率,硬件成本以及广泛行业的潜在应用。研究成果发表在专业会议和期刊上,并纳入大学电气/计算机工程课程。该奖项反映了NSF的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
It is now a national research priority to design and develop novel computer hardware for artificial intelligence as well as smart sensing with capabilities for high-performance and energy-efficient computing. This project proposes a new architecture, PARIS (Phased Array Radar with In-Sensor Computing), that simultaneously senses and processes 3D images in real time. The new architecture mimics the human visual system, which not only detects and senses 3-D visual images but also performs first-stage image processing before the more complex processing in the visual cortex of brain. It is the first in-sensor computing architecture leveraging a phased-array radar system for an energy-efficient, high-performance, low-cost, and compact sensing/computing platform. By combining phased-array radar imaging and neuromorphic computing, PARIS opens up a new avenue for research in in-sensor computing and intelligent image processing. The project has transformative impact on a wide range of industries including medical instruments, autonomous vehicles, machine vision, robotic control, IoT devices, smartphones, and consumer electronics. Research activities of the project are involving female and minority students, strengthening the PIs’ current K-12 outreach activities, and enhancing grand-challenge courses for all majors at the university.It is well-known in artificial-intelligence systems that moving raw data from sensors to processing elements is very costly in terms of energy, performance, and hardware. The newly proposed architecture starts artificial neural-network computation concurrently while sensors are acquiring data, substantially reducing data movement between sensors and processing elements. Such simultaneous sensing and computation are made possible by several technology breakthroughs. 1) In-sensor dot-product computations with linearly tunable weights allowing in-sensor training and inference of artificial neural network; 2) a novel statistical signal acquisition technique, namely, Jitter-based Analog-to-Probability Conversion, allowing for direct use of digital pins of integrated circuits for high-bandwidth measurement with low-overhead; 3) a compact single-board system supporting very high radio frequency bandwidths and completely removing the radio frequency analog front-end required by conventional microwave imaging systems (e.g. analog-to-digital converter, filter, or amplifier) by leveraging the very short rising/falling edges of the digital waveforms used in today’s I/O interfaces. The theory and design of the in-sensor computing architecture is being established, and a 16-node prototype is being built. A thorough evaluation and comparison is being conducted to demonstrate its performance, energy efficiency, hardware cost, and potential applications to a wide range of industries. Research results are being published in professional conferences and journals and incorporated into undergraduate electrical/computer engineering curricula.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
SaTC: CORE: Medium: Introducing DIVOT: A Novel Architecture for Runtime Anti-Probing/Tampering on I/O Buses
-
批准号:2027069
-
项目类别:Standard Grant
-
资助金额:$60.0万
-
财政年份:2020
-
负责人:Qing Yang
-
依托单位:
EAGER: SaTC: Privacy-Preserving Convolutional Neural Network for Cooperative Perception in Vehicular Edge Systems
-
批准号:2037982
-
项目类别:Standard Grant
-
资助金额:$9.99万
-
财政年份:2020
-
负责人:Qing Yang
-
依托单位:
NeTS: EAGER: Intelligent Information Dissemination in Vehicular Networks based on Social Computing
-
批准号:1761641
-
项目类别:Standard Grant
-
资助金额:$13.56万
-
财政年份:2017
-
负责人:Qing Yang
-
依托单位:
NeTS: EAGER: Intelligent Information Dissemination in Vehicular Networks based on Social Computing
-
批准号:1644348
-
项目类别:Standard Grant
-
资助金额:$18.0万
-
财政年份:2016
-
负责人:Qing Yang
-
依托单位:
SHF: Small: Introducing Next Generation I/O Accelerator
-
批准号:1421823
-
项目类别:Standard Grant
-
资助金额:$48.0万
-
财政年份:2014
-
负责人:Qing Yang
-
依托单位:
Introducing I-CASH, A New Disk IO Architecture
-
批准号:1017177
-
项目类别:Standard Grant
-
资助金额:$38.29万
-
财政年份:2010
-
负责人:Qing Yang
-
依托单位:
Understanding, Analyzing, and Designing Storage Subsystem Architectures for Maximum Data Recoverability
-
批准号:0811333
-
项目类别:Standard Grant
-
资助金额:$29.9万
-
财政年份:2008
-
负责人:Qing Yang
-
依托单位:
SGER: Validation and Evaluation of A New Data Replication Technology
-
批准号:0610538
-
项目类别:Standard Grant
-
资助金额:$0.0万
-
财政年份:2006
-
负责人:Qing Yang
-
依托单位:
ITR--Benchmarking and Profiling Tools for Disk I/O and Networked Storage Systems
-
批准号:0312613
-
项目类别:Standard Grant
-
资助金额:$0.0万
-
财政年份:2003
-
负责人:Qing Yang
-
依托单位:
Boosting Web Server Performance Using DRALIC----Distributed RAID and Location Independence Caching
-
批准号:0073377
-
项目类别:Continuing Grant
-
资助金额:$19.93万
-
财政年份:2000
-
负责人:Qing Yang
-
依托单位:
A New Spectrum of Hierarchical Storage Architectures for High Performance Disk I/Os
-
批准号:9714370
-
项目类别:Standard Grant
-
资助金额:$35.95万
-
财政年份:1997
-
负责人:Qing Yang
-
依托单位:
Exploring the Design Space for High Performance and Low Cost Memory Hierarchies
-
批准号:9505601
-
项目类别:Standard Grant
-
资助金额:$17.94万
-
财政年份:1995
-
负责人:Qing Yang
-
依托单位:
Introducing a Novel Cache Design to Vector Computers
-
批准号:9208041
-
项目类别:Standard Grant
-
资助金额:$14.2万
-
财政年份:1992
-
负责人:Qing Yang
-
依托单位:
Design and Analysis of High Performance Cache-coherent Multiprocessors Based on Shared Buses
-
批准号:8909672
-
项目类别:Standard Grant
-
资助金额:$5.99万
-
财政年份:1989
-
负责人:Qing Yang
-
依托单位:
海外基金