Evaluation of Si/Ge ALE super lattice with high depth resolution AES method

为了评价Si/Ge异质界面的致密性，我们发展了俄歇电子能谱（AES）深度剖面分析的新方法。通过优化Ar溅射的加速电压、电子束流密度和电子束直径，确定了用Si（111）单晶片和仔细氧化的Si/SiO_2界面过渡区小于1 nm。此外，俄歇电子的逃逸深度λ在小于100 eV的低动能区只有0.5nm，但对原子突变界面的评价有很大影响。由计算得到的深度分布推断出过渡区的宽度为0.35nm。该值几乎与1个原子层相同。利用原子层外延（ALE）技术，我们将这种新方法应用于由3个Ge单层（ML）和7个Si单层（ML）组成的Si/Ge异质超晶格。确认了观察到的AES强度分布沿着深度表示为超晶格结构。Ge的信号强度在Si/Ge界面处急剧变化，这意味着Ge的偏析被很好地抑制。根据本实验，Si和Ge缓冲层的平坦性对于抑制超晶格应变具有重要作用。因此，我们优化了缓冲层的生长条件，使其生长速率控制在0.5nm/min以下，Ge和Si缓冲层的厚度分别为0.15nm和0.1nm。应用CAICISS软件对早期ALE进行研究。ALE方法证实了逐层生长。

In order to evaluate abruptness of Si/Ge hetero interface, we have developed novel analysis method for depth profile for Auger Electron Spectroscopy (AES). By optimizing accelerating voltage of Ar sputtering, electron-beam current density and electron-beam diameter, we have confirmed that transition region of Si and SiO2 interface which was well known as a atomically flat by using Si(111) just wafer and oxidizing very carefully was lower than 1nm. Further more, escape depth λ of Auger electron has strong influence on the evaluation of atomically abrupt interface although it is a short as 0.5nm in a low kinetic energy region less that 100eV. Then deduced transition region obtained from calculated depth profiles was as narrow as 0.35nm. This value was almost same as 1 atomic layer. Also we have confirmed that flatness of etched surface was kept in a very good condition by AFM measurement.We have applied this novel method to Si/Ge hereto-super lattice which consists of 3 Mono Layer (ML) of Ge and 7ML of Si by using atomic layer epitaxy (ALE). It was confirmed that observed AES intensity distribution along the depth was represented to the supper lattice structure. Signal intensity of Ge was sharply changed at Si/Ge interfaces and this means that segregation of Ge was well suppressed. According to this experiment, flatness of both Si and Ge buffer layers had important role for suppressing the strain of the supper lattice. Thus we have optimizing the growth condition of buffer layer to suppressing growth rate lower than 0.5nm/min. Runs of Ge and Si buffer layer were 0.15nm and 0.1nm, respectively. Early stage of ALE was investigated by using CAICISS. Layer by layer growth was confirmed for the ALE method.