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Energy Proportional Computing With Heterogeneous and Reconfigurable Processors (ENPOWER)

Energy Proportional Computing With Heterogeneous and Reconfigurable Processors (ENPOWER)
使用异构和可重构处理器的能量比例计算 (ENPOWER)
批准号:
EP/L00321X/1
负责人:
Jose Nunez-Yanez
金额:
$50.04万
依托单位:
依托单位国家:
英国
项目类别:
Research Grant
财政年份:
2013
资助国家:
英国
项目状态:
已结题
起止时间:
2013 至 --

项目摘要

项目成果

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中文摘要
翻译
能源效率是现代加工系统设计的主要制约因素之一。有限的电池寿命和过高的内部功率密度限制了硅芯片中可以同时工作的晶体管数量。传统计算的能源和功率降低受到无法修改架构或适应制造工艺、温度或芯片制造后应用要求变化的限制。当这些变化可能发生时,会受到“边际”需求的限制,即引入安全边际,使设备在最恶劣的条件下运行。最坏的情况很少发生,如果技术能够适应实际的操作条件,就有可能获得重要的能源和性能收益。本研究通过研究具有新型电压、频率和逻辑缩放三重组的能量比例计算来解决这一挑战,以适应应用、制造或操作条件的变化。这项研究的结果有望为以下问题提供新的基本见解:未来的计算机如何在有限的能源预算下获得数量级的更高性能?
英文摘要
Energy efficiency is one of the primary design constraints for modern processing systems. Limited battery life and excessive internal power densities limit the number of transistors that can be active simultaneous in a silicon chip. Energy and power reduction in conventional computing is limited by the inability of modifying the architecture or adapting to changes in the fabrication process, temperature or application requirements after chip fabrication. When these changes are possible are limited by the need of "margining" that introduces safety margins so devices operate under worst conditions. Worst conditions are rarely the case an important energy and performance gains are possible if technology can adapt to the real conditions of operation. This research addresses this challenge by investigating energy proportional computing with a novel voltage, frequency and logic scaling triplet to adapt to changes in applications, fabrication or operating conditions. The results from this research are expected to deliver new fundamental insights to the question of: How future computers can obtain orders of magnitude higher performance with limited energy budgets?
期刊论文(10)
专著(0)
科研奖励(0)
会议论文
Synchronizing reconfiguration of coherent functions on disaggregated FPGA resources
在分解的 FPGA 资源上同步重新配置相干功能
DOI: 10.1109/reconfig.2017.8279822
发表时间: 2017
期刊:
影响因子: --
作者: [Chen Q]
通讯作者: Chen Q
SiP-enabled FPGA Network Interface for Programmable Access to Disaggregated Data Centre Resources
支持 SiP 的 FPGA 网络接口,用于对分类数据中心资源进行可编程访问
DOI: 10.1364/acpc.2017.su2a.78
发表时间: 2017
期刊:
影响因子: --
作者: [Chen Q]
通讯作者: Chen Q
DOI: 10.1155/2018/8785903
发表时间: 2018-02
期刊: Int. J. Reconfigurable Comput.
影响因子: --
作者: [Qianqiao Chen;Vaibhawa Mishra;J. Núñez-Yáñez;G. Zervas]
通讯作者: Qianqiao Chen;Vaibhawa Mishra;J. Núñez-Yáñez;G. Zervas
DOI: 10.1049/iet-cdt.2013.0087
发表时间: 2014-06
期刊: IET Comput. Digit. Tech.
影响因子: --
作者: [A. Beldachi;S. Hollis;J. Núñez-Yáñez]
通讯作者: A. Beldachi;S. Hollis;J. Núñez-Yáñez
共 9 条
    Heterogeneous computing platforms for resource-aware video and data analytics (HOPWARE)
    • 批准号:
      EP/V040863/1
    • 项目类别:
      Research Grant
    • 资助金额:
      $1.58万
    • 财政年份:
      2021
    • 负责人:
      Jose Nunez-Yanez
    • 依托单位:
    ENergy Efficient Adaptive Computing with multi-grain heterogeneous architectures (ENEAC)
    • 批准号:
      EP/N002539/1
    • 项目类别:
      Research Grant
    • 资助金额:
      $72.27万
    • 财政年份:
      2016
    • 负责人:
      Jose Nunez-Yanez
    • 依托单位:
    Energy Efficient Networks-on-Chip for Dynamically Reconfigurable Computing Platforms.
    • 批准号:
      EP/E062164/1
    • 项目类别:
      Research Grant
    • 资助金额:
      $36.05万
    • 财政年份:
      2007
    • 负责人:
      Jose Nunez-Yanez
    • 依托单位:
    Dynamically Reconfigurable Hardware Architectures for Context-Based Statistical Compression of Visual and Data Content
    • 批准号:
      EP/D011639/1
    • 项目类别:
      Research Grant
    • 资助金额:
      $21.15万
    • 财政年份:
      2006
    • 负责人:
      Jose Nunez-Yanez
    • 依托单位:
    海外基金