3DX: A Micromachined Silicon Crystallographic Detector

描述（由申请人提供）：我们建议继续开发“3DX”硅像素阵列探测器，其中衍射X射线直接捕获厚的高电阻率硅，通过电感耦合等离子体蚀刻进行微机械加工。每个像素为150 × 150 μ m，有一个n型和一个p型电极，并与导电（铟）凸块粘合在传感器后面的CMOS读出芯片的相应像素上。每个硅传感器是一个64x64像素的阵列（总尺寸：9.6mmx9.6mm）。在我们的设计中，传感器晶片是活跃到非常边缘的。这些传感器的重叠阵列因此没有死隙。我们现在已经制造了数百个传感器，对其中的许多进行了测试，并且它们工作正常。我们现在还学习了碰撞键合的艺术，并成功地将我们的传感器连接到我们的读出芯片上，而没有键合缺陷。我们设计、制造、调试、测试和表征了CMOS读出芯片，该芯片在传感器后面的三面保护X射线。读出芯片工作，但我们需要纠正设计中的小错误，并在下一个项目期间将其扩展到全尺寸。我们的探测器区分单个X射线，但线性响应辐射水平接近400,000/s/像素。它的点响应位于单个像素内。它以64 μ s的周期连续读出。在项目的下一阶段，我们将制造许多全尺寸传感器/ASIC模块三明治，设计和制造一个现场可编程门阵列（FPGA）来控制模块并将其连接到主机，并设计和实现一个集成系统，包括控制软件。在第三年，我们将制作我们的第一个实用系统：一个专门为生物样品的高速时间分辨小角度x射线衍射设计的小型阵列。在第4-5年，我们将制作一个大型的蛋白质晶体检测系统，该系统将包含900 - 1000个模块，覆盖面积为30cm x 30cm。

DESCRIPTION (provided by applicant): We propose to continue development of the "3DX" silicon pixel array detector, in which diffracted X rays are captured directly in thick, high-resistivity silicon, micromachined by inductively-coupled plasma etching. Each pixel is 150x150mu m with one n- and one p-type electrode, and it is bonded with a conducting (indium) bump to a corresponding pixel of a CMOS readout chip, located behind the sensor. Each silicon sensor is an array of 64x64 pixels (total size: 9.6mmx9.6mm). In our design the sensor wafer is active to the very edge. Overlapping arrays of these sensors therefore have no dead gaps. We have now fabricated many hundreds of sensors, tested many of them, and they work. We have now also learned the art of bump- bonding, and have succeeded in bonding our sensor to our readout chip without bonding defects. We have designed, fabricated, debugged, tested, and characterized the CMOS readout chip, which is protected from X rays behind the sensor on three sides. The readout chip works, but we need to correct minor bugs in the design, and expand it to full size, during the next project period. Our detector discriminates individual X rays yet responds linearly to radiation levels approaching 400,000/s/pixel. Its point response lies within a single pixel. It reads out continuously with a 64mu s period. During the next stage of the project we will fabricate many full-scale sensor/ASIC module sandwiches, design and make a field-programmable gate array (FPGA) to control the module and interface it to a host computer, and design and implement an integrated system that includes controls software. In year 3 we will make our first practical system: a small array designed specifically for high-speed time-resolved small-angle X-ray diffraction of biological samples. In years 4-5 we will make a large detector system for protein crystallography that will incorporate between 900 -1,000 modules and cover an area of 30cm x 30cm.