High speed broadband circuits

我们建议探索在铜质背板上可实现的最大带宽，考虑连接器、通孔、存根等造成的影响。虽然更高的速度将是主要主题，但这项研究可能会在未来几代均衡中包括一些相关或次要的问题。这些可能包括增加传输的物理距离和更好的色散覆盖，更好的模拟性能(包括更低的功率、更小的面积和更高的带宽)，包括发射端的复杂性，如预加重、双二进制、PAM信令。作为起点，我们希望从我们以前的经验和文献中探索当前使用的技术和电路在实现更快的速度和更好的性能方面的局限性，并在这样做的同时期望提出一些有趣的电路或体系结构。这项工作的一个可能结果可能是，我们得出结论，需要一个不同的进程来实现我们的目标。作为这项工作的一部分，我们希望探索其他替代方案，例如，探索使用片上电感来形成延迟元件的基础和作为峰值电路。在更低的频率下，例如10Gbit/S，电感往往会占用大量的芯片面积，因此它们的使用受到限制。然而，在更高的频率下，LC电路更可行，同时，有源电路元件正在经历质量损失。在某些频率下，使用LC电路可能是有利的，我们的研究将被用来确定这种交叉发生在哪里。作为一个相关的问题，这项研究将检查电感的基本限制，看看是否可以通过使用多层或差分结构来使电感更小，是否可以将电感放置得更近，例如通过更好的屏蔽或通过故意允许它们耦合，以及在哪些情况下可以将有源电路放置在很近的地方，甚至在电感下面。这样的研究还将包括对片上耦合和串扰以及诸如屏蔽等改善隔离的技术的研究。

We propose the exploration of the maximum bandwidth achievable over a copper backplane considering effects caused by connectors, vias, stubs, etc. While higher speed will be the main topic, this study may include a number of related or secondary issues in future generations of equalization. These could include increasing the physical distance of transmission and better dispersion coverage, better analog performance including lower power, lower area and higher bandwidth, inclusion of transmit side sophistication such as pre-emphasis, duo-binary, PAM signaling. As a starting point, we expect to explore the limitations of the currently used technology and circuits, both from our previous experience and from the literature, in achieving higher speed and better performance, and while doing so expect to come up with some interesting circuits or architectures. A possible outcome of this work could be that we conclude that a different process is required to meet our objectives. As part of this, we expect to explore other alternatives, for example, an exploration of the use of on-chip inductors to form the basis of delay elements and as peaking circuits. At lower frequencies, e.g., 10 Gbit/s, inductors tend to take up a lot of die area so their use is limited.  However, at higher frequencies, LC circuits are more feasible while at the same time, active circuit components are experiencing a loss of quality. At some frequency, it may be advantageous to use LC circuits and our research will be used to determine where such a crossover occurs.  As a related issue, this research will examine fundamental limitations of inductors to see if inductors can be made smaller, for example through the use of multiple layers or differential structures, if inductors can be placed closer together, for example by better shielding or by deliberately allowing them to be coupled, and under which circumstances active circuitry can be placed in close proximity, or even underneath inductors.  Such a study would also include a study of on-chip coupling and cross talk and techniques such as shielding to improve isolation.