Design-for-test techniques for 60 GHz ISM radio applications

随着以60 GHz为中心的7 GHz无许可频谱的提供，全世界的注意力现在都集中在利用这一资源进行新的消费应用上，例如用于高数据速率无线传输、汽车防撞雷达应用和汽车自适应巡航控制，仅举几例。从历史上看，以化合物半导体技术实现的60 GHz电子产品的成本高得令人望而却步。今天，人们相信，完全集成的CMOS实施将把这一成本推高到可接受的消费者价格点。然而，在此之前，必须实现完全集成的CMOS方法的两个重要方面：低成本封装和低成本生产测试。国际半导体技术路线图(ITRS)年复一年地指出，封装和测试成本至少占任何混合信号或射频电路产品成本的三分之二。虽然在封装领域正在发生重要的发展，比如使用倒装芯片技术将裸露的芯片直接粘接在低温共烧陶瓷基板上，完全消除了封装，但我们也看到了相反方向的发展。新的3D硅技术使使用层叠芯片的复杂硅系统得以实现，这些芯片使用贯通硅通孔(TSV)。这种包装技术在很大程度上依赖于已知良好的芯片的可用性来维持高产品产量。无论使用何种封装组件，成本效益测试技术的重要性对于ISM频段60 GHz无线电的任何进步都至关重要。因此，这项研究计划的目标是为60 GHz无线电确定可能的面向生产的测试技术。本研究计划将专门考虑与测试相关的五个主要方向：(1)晶圆和最终测试期间激活的片上仪器，(2)数字I/O的高速测试，(3)无线、非接触测试，(4)3D CMOS管芯上的测试仪，以及(5)射频电路的自适应测试技术。所有五个方向都将考虑总体测试时间、成品率损失和组件成本。

With the availability of 7 GHz of unlicensed spectrum centered around 60 GHz, attention throughout the world is now focused on utilizing this resource for new consumer applications such as for high-data rate wireless transmission, automotive collision avoidance radar applications and automotive adaptive cruise control, to name just a few. Historically, the cost of 60 GHz electronics, implemented in compound semiconductor technology, has been prohibitively expensive. Today, it is believed that a fully integrated CMOS implementation will drive this cost to an acceptable consumer price point. However, before this happens, two important aspects of a fully integrated CMOS approach must be realized: low-cost packaging and low-cost production testing. It has been noted year after year in the international technology roadmap for semiconductors (ITRS) that packaging and test costs amount for at least two-thirds of the product cost of any mixed-signal or RF circuit. While important developments are taking place in the packaging arena, like bonding bare die directly on low-temperature co-fired ceramic substrates using flip-chip techniques, eliminating the package altogether, we are also seeing developments in the opposite direction. New 3D silicon technologies are enabling the realization of complex silicon systems using stacked dies using through-silicon-vias (TSVs). Such packaging techniques rely heavily on the availability of known-good-die to maintain high product yields. Regardless of the packaging assemble used, the importance of cost effective test techniques are central to any advancement in 60 GHz radios for the ISM frequency band. It is therefore the objective of this research program to identify possible production-oriented test techniques for 60 GHz radio. This research program will consider five major directions related exclusively with test: (1) on-chip instruments active during wafer and final test, (2) high-speed test of digital I/Os, (3) Wireless, non-contact testing, (4) tester on a die in 3D CMOS, and (5) adaptive test techniques for RF Circuits. All five directions will consider overall test time, yield loss and component costs.