Design-for-test techniques for 60 GHz ISM radio applications

随着以60 GHz为中心的7 GHz免授权频谱的可用性，全世界的注意力现在都集中在利用这一资源进行新的消费应用，如高数据速率无线传输、汽车防撞雷达应用和汽车自适应巡航控制，仅举几例。从历史上看，60 GHz电子器件的成本，在化合物半导体技术中实现，一直是令人望而却步的昂贵。今天，人们相信，完全集成的CMOS实现将推动这一成本到一个可接受的消费价格点。然而，在此之前，完全集成CMOS方法的两个重要方面必须实现：低成本封装和低成本生产测试。国际半导体技术路线图（ITRS）年复一年地指出，任何混合信号或射频电路的封装和测试成本至少占产品成本的三分之二。虽然封装领域正在发生重要的发展，例如使用倒装芯片技术将裸模直接粘合在低温共烧陶瓷基板上，从而完全消除了封装，但我们也看到了相反方向的发展。新的3D硅技术使使用使用硅通孔（tsv）的堆叠模具实现复杂的硅系统成为可能。这种封装技术在很大程度上依赖于已知好的模具的可用性，以保持高产品产量。无论使用何种封装组装，具有成本效益的测试技术的重要性对于ISM频段60ghz无线电的任何进步都至关重要。因此，本研究计划的目标是确定60 GHz无线电可能的面向生产的测试技术。该研究计划将考虑与测试相关的五个主要方向：(1)在晶圆和最终测试期间活跃的片上仪器，(2)数字I/ o的高速测试，(3)无线，非接触测试，(4)3D CMOS芯片上的测试，以及(5)射频电路的自适应测试技术。所有五个方向都将考虑总体测试时间、产量损失和组件成本。

With the availability of 7 GHz of unlicensed spectrum centered around 60 GHz, attention throughout the world is now focused on utilizing this resource for new consumer applications such as for high-data rate wireless transmission, automotive collision avoidance radar applications and automotive adaptive cruise control, to name just a few. Historically, the cost of 60 GHz electronics, implemented in compound semiconductor technology, has been prohibitively expensive. Today, it is believed that a fully integrated CMOS implementation will drive this cost to an acceptable consumer price point. However, before this happens, two important aspects of a fully integrated CMOS approach must be realized: low-cost packaging and low-cost production testing. It has been noted year after year in the international technology roadmap for semiconductors (ITRS) that packaging and test costs amount for at least two-thirds of the product cost of any mixed-signal or RF circuit. While important developments are taking place in the packaging arena, like bonding bare die directly on low-temperature co-fired ceramic substrates using flip-chip techniques, eliminating the package altogether, we are also seeing developments in the opposite direction. New 3D silicon technologies are enabling the realization of complex silicon systems using stacked dies using through-silicon-vias (TSVs). Such packaging techniques rely heavily on the availability of known-good-die to maintain high product yields. Regardless of the packaging assemble used, the importance of cost effective test techniques are central to any advancement in 60 GHz radios for the ISM frequency band. It is therefore the objective of this research program to identify possible production-oriented test techniques for 60 GHz radio. This research program will consider five major directions related exclusively with test: (1) on-chip instruments active during wafer and final test, (2) high-speed test of digital I/Os, (3) Wireless, non-contact testing, (4) tester on a die in 3D CMOS, and (5) adaptive test techniques for RF Circuits. All five directions will consider overall test time, yield loss and component costs.