High Performance Deep Scaled CMOS Transceivers

这项研究的目的是促进单片无线电电路的技术进步。作者已经为窄带通信制造了目前处于工业生产中的电路。此外，他还致力于宽带相控阵无线通信电路和所有数字锁相环电路(ADPLL)，这些电路既可用于计算机系统中的无线网络，也可用于局域网。这包括完整的射频和模拟无线电子系统，以及前端、频率合成和模数转换电路。通过整合所有这三个领域的工作，他可以做出适当的权衡，并利用系统组件之间的协同效应。 这项工作的主要重点是从晶体管沟道长度远低于100 nm的低成本深比例CMOS技术中获得高性能。正在开发的两项新技术是低功率/相位噪声注入锁定振荡器和低抖动/高线性度亚采样电路，可用于接收数据并作为亚采样合成器的一部分。最近，这些技术作为毫米波相控阵架构的一部分和注入锁定旋转行波振荡器的一部分集成在一起，提供了卓越的性能和低功耗。具体地说，这些实现的现有技术的相位噪声性能解决了高数据速率无线系统的关键限制之一。这项工作的重要意义将是能够生产低成本、高度集成的具有数据速率能力的CMOS收发器，以支持要求最苛刻的应用，如流视频和千兆位无线数据网络。 这项工作的关键方面之一将是开发高频低相位振荡器和合成器，这通常是使用高阶调制信号的无线收发机的限制因素。同样重要的是，能够在不降低性能或大幅增加功耗的情况下，以深度扩展的cmos技术实现这些电路，并在整个IC中分发它们的信号。作者对早期的结果感到鼓舞，并指出该技术在雷达系统、片上时钟分配网络和高性能SERDES电路中有更广泛的应用。

The objective of this research is to advance the art of monolithic radio circuits. The author has produced circuits now in industrial production for narrow band communications. As well, he is working on broadband phased array wireless communications circuits and All Digital Phase-Lock Loop Circuits (ADPLLs) that can be used for both wireless and local area networking in computer systems. This includes the complete RF and analog radio subsystem, with work on front-end, frequency synthesis and analog/digital conversion circuits. By integrating efforts in all three areas, he can make proper tradeoffs and exploit synergies between system components. The main focus of this effort is directed at getting high performance from low-cost deep scaled CMOS technologies with transistor channel lengths well below 100nm. Two novel technologies being developed are low power/phase noise injection locked oscillators and low jitter/high linearity subsampling circuits that can be used for receiving data and as part of a subsampling synthesizer. Most recently, these technologies have been integrated as part of millimeter wave phased array architecture and as part of an Injection Locked Rotary Travelling Wave Oscillator which provide superior performance with low power consumption. In particular, the state of the art phase noise performance of these implementations addresses one of the key limitations of high data rate wireless systems. The significance of this work will be the ability to produce low cost highly integrated CMOS transceivers with data rates capabilities to support the most demanding applications such as streaming video and gigabit wireless data networks. One of the critical aspects of this work will be developing high frequency low phase oscillators and synthesizers which are typically the limiting factor in wireless transceivers using higher order modulation signals. Also critical is the ability to implement these circuits in deep scaled CMOS technologies and distribute their signals throughout an IC without degrading performance or greatly increasing power consumption. The author is encouraged by early results and would note that this technology has broader applications in radar systems, on-chip clock distribution networks and high performance SERDES circuits.