Electronic Conduction in Submicron Field-Effect Transistors

最近的研究结果表明，金属-绝缘体-硅场效应晶体管（MOSFET）可以做得足够窄，以至于其中的电子传导过程发生了根本性的变化。在低温下，当栅极上的电压变化时，可以观察到电导的大的、非单组的变化。最近在具有70nm宽反转层的器件上的研究结果表明，电流受到电子在MOSFET反转层中的局域态隧穿的限制。这显然是由氧化物表面离子产生的随机电位或栅线宽度的变化引起的。这代表了一种不寻常的情况，在这种情况下，电流只受到通过一个电子态的电子跃迁的限制。新的制造方法正在发展，其目标是减少由氧化物表面杂质和氧化物中的局部电子态引起的混乱，并使栅线更窄，更均匀。这些设备是在麻省理工学院亚微米结构实验室制造的，它们在2℃以上的温度下进行表征；麻省理工学院的soK。

Recent results have demonstrated that metal-insulator-Si-field-effect transistors (MOSFET's) can be made narrow enough that the electronic conduction process in them changes in a fundamental way. At low temperature, large, nonmonotomic variations of the conductance are observed when the voltage on the gate is varied. Recent results on devices with 70nm wide inversion layers indicate that the current is limited by electron tunneling through localized states in the inversion layer of the MOSFET. These are apparently caused by the random potential resulting from ions on the surface of the oxide or variations in the width of the gate wire. This represents an unusual situation in which the current is limited by electronic transitions through just one electronic state. New fabrication methods are being developed with the goals of reducing the disorder caused by impurities on the oxide surface and localized electronic states in the oxide, and making the gate wires narrower and more uniform. Devices are being fabricated in the MIT Submicron Structures Laboratory, and they are being characterized at temperatures above 2;soK at MIT.