Algorithms for VLSI Design

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Thomborson The theory underlying optimal adder design and global wire routing is well understood, so the focus is on implementation issues. Experimental software is being developed to determine optimal adders. Attention is being paid to tradeoffs between the smallest area, fastest, and least power adders. The feasibility of using large linear programs to solve the problem of routing wires on chips and modules is being investigated. Theoretical work is on the problem of finding minimum length tree shaped interconnections (Steiner trees) among a set of terminals on a VLSI chip. Rendering grey-scale images on a monochrome display terminal or laser printer is being explored. Algorithms, amenable to speedup on parallel or pipelined computers, are sought.