RIA: New Approaches to Partitioning for Large-Scale VLSI Systems

RIA：大规模 VLSI 系统分区的新方法

• 批准号: 9110696
• 负责人: Andrew Kahng
• 金额: $ 6.99万
• 依托单位: University of California-Los Angeles
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1991
• 资助国家: 美国
• 起止时间: 1991-07-15 至 1993-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9110696&HistoricalAwards=false
• 关键词: RIA; New; Approaches; Partitioning; Large

The research is on high-level system design, with a focus on partitioning logic among functional modules. Three new problem formulations and algorithms for performance driven layout are being investigated. These are: (1) numerical methods for finding sparse cuts for logic bi-partitioning with extensions to multi-way logic partitions; (2) techniques for estimating rapidly optimal solution values in large scale partition problems. These methods are based on random walks and the theory of simulated annealing, and have extensions to module area estimation for floorplan synthesis; and (3) a theoretical foundation (weighted module packing) for the performance-driven partitioning problem. Provably good algorithms for this problem are being examined.

研究是在高层次的系统设计，重点是 在功能模块之间划分逻辑。 三新问题 性能驱动布局的公式和算法正在 研究了 这些方法是：（1）寻找稀疏 具有多路逻辑扩展的逻辑二分区的切割 （2）快速估计最优解的技术 大规模分区问题中的值。 这些方法基于 随机游走和模拟退火理论， 扩展到用于平面布置图合成的模块面积估计;以及 (3)的理论基础（加权模块包装） 性能驱动的分区问题。 可证明的好算法 这个问题正在研究中。