CPA-DA Collaborative Research: Research on Benchmarking and Robustness of VLSI Sizing Optimizations

CPA-DA 合作研究：VLSI 规模优化的基准测试和鲁棒性研究

• 批准号: 0811866
• 负责人: Andrew Kahng
• 金额: $ 15万
• 依托单位: University of California-San Diego
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-08-01 至 2011-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0811866&HistoricalAwards=false
• 关键词: CPA; DA; Collaborative; Research; Benchmarking

Proposal IDs: 0811832 & 0811866PI names: Andrew Kahng & Puneet GuptaTitle: Collaborative Research: Research on Benchmarking and Robustness of VLSI Sizing OptimizationsInst: UCSD & UCLAABSTRACTThe proposed research will investigate the ?sizing? optimizations that underlie all practical tradeoffs of integrated-circuit area, delay and power metrics. The intellectual merit of our proposed research stems from its broad and multi-pronged attack on a fundamental type of design optimization. The PIs will investigate core aspects of optimization including technology strategy based on fast estimation of achievable solution quality, benchmarking of optimization heuristics and strengthening of iterative optimization heuristics by use of stronger move ?operators?. The PIs will also address fundamental changes to the optimization context such as the potential need for statistical optimization in a regime of uncontrollable manufacturing variability and the need for incremental optimization under the regime of evolving process models.The broader impact of the proposed research lies in helping chip designers and manufacturers reduce design turnaround time in addition to IC area, delay and power metrics. This will enable the design of more complex and functional products within a given cost and power envelope; as such, our proposed research will have very substantial research and commercial impact. Other impacts will include open-source tools that will establish a baseline and foundation for further work by other research groups, preventing the wasted effort of reinventing the wheel that is endemic to experimental research today.

提案ID：0811832 0811866 PI姓名：Andrew Kahng Puneet Gupta标题：合作研究：超大规模集成电路尺寸优化的基准和鲁棒性研究Inst：UCSD UCLAABSTRACT拟议的研究将调查？尺寸？这些优化是集成电路面积、延迟和功率度量的所有实际权衡的基础。我们提出的研究的智力价值源于其广泛和多管齐下的攻击的基本类型的设计优化。PI将研究优化的核心方面，包括基于快速估计可实现的解决方案质量的技术策略，优化算法的基准测试以及通过使用更强的移动来加强迭代优化算法。运营商？PI还将解决优化环境的根本变化，例如在无法控制的制造可变性制度下的统计优化的潜在需求，以及在不断发展的工艺模型制度下的增量优化需求。拟议研究的更广泛影响在于帮助芯片设计师和制造商减少设计周转时间，以及IC面积，延迟和功率指标。这将使得在给定的成本和功率范围内设计更复杂和功能更强的产品成为可能;因此，我们提出的研究将产生非常重大的研究和商业影响。其他影响将包括开源工具，这些工具将为其他研究小组的进一步工作建立基线和基础，防止浪费精力重新发明当今实验研究所特有的轮子。