Innovation in VLSI Systems Education: Integration of High Level Synthesis, Analysis and Test Generation Research Results into Undergrad Minor Curriculum in VLSI Systems Engineering

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9634462 Vemuri, Ranganadha Carter, Harold University of Cincinnati Innovation in VLSI Systems Education: Integration of High Level Synthesis, Analysis and Test Generation Research Results into Undergraduate Minor Curriculum in VLSI Systems Engineering This CISE Educational Innovation award supports the integration of research in high-level VLSI synthesis, performance analysis and test vector generation into the undergraduate curriculum in VLSI systems engineering. The model curriculum will contain topics on the development of high-level functional and behavioral modeling of VLSI designs, use of high-level VLSI synthesis techniques and tools, developing and using performance models throughout the design process, and generation of design verification tests. Curriculum support material will include mini-books on these topics, term project modules, and, most importantly, free software tools for high-level synthesis, performance analysis and test generation. All of the curriculum material will disseminated through the Internet and the World-Wide-Web.