SHF: Small: Collaborative Research: Variation-Resilient VLSI Systems with Cross-Layer Controlled Approximation

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Applications driven by human-computer interactions through the five human senses are projected to underpin the next generation of computing. For many of these applications, occasional small errors are often not only acceptable but also bring opportunities for building lighter, cheaper, and more robust systems that use less energy and may have a longer battery life. This project will study how to advance computing technology by allowing deliberate imprecision in hardware implementations through the notion of approximate computing. The outcomes of this project will be a set of design techniques for approximate computing that can become a key component of hardware computing technology, potentially benefiting systems ranging from high performance computing for big data analytics and low power implementation for internet of things. This project will also provide an opportunity for training students with the latest design and computing technology. The research goals of this project are to create new approximate computing techniques to optimize a system at all stages of its life, from design-time to runtime, which can enable cross-layer control of performance-power-precision trade-offs. The research agenda consists of several components. First, new error models with different accuracy-complexity trade-offs will be developed. Second, new design-time optimization techniques, especially hardware resource scheduling and binding in high-level synthesis, will be studied with consideration of approximation, variation, and runtime circuit reconfiguration. Third, compile-time and operating-system-level task mapping/scheduling algorithms will be investigated to make the best use of circuits with various precisions. Last but not least, runtime precision control techniques will be explored in conjunction with dynamic voltage and frequency scaling in order to achieve a smooth trade-off between power and user experience.