CAREER: A Simultaneous Multithreading System Architecture
职业:同步多线程系统架构
基本信息
- 批准号:9701708
- 负责人:
- 金额:$ 21万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:1997
- 资助国家:美国
- 起止时间:1997-07-01 至 2002-06-30
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
The research portion of this project advances the study of simultaneous multithreading, a processor architecture technique aimed at increasing the utilization of the execution resources in processors that issue multiple instructions in each clock cycle. The research objectives are threefold: (1) to re-evaluate memory system architecture in light of a simultaneous multithreaded workload; (2) to investigate processor issues such as synchronization methods and strategies to deal with large register files; (3) to address the implications of simultaneous multithreading on the software system. The work entails revamping of an existing simulator for multithreaded processors, and use of the new simulator in evaluating alternatives. The educational portion concentrates on a revamping of the department curriculum in computer architecture. New graduate courses on computer architecture are being introduced, and simultaneous multithreading is being integrated into the core architecture courses for undergraduates. All course work is being enhanced with hands-on experimentation with instruction-level simulation.
该项目的研究部分推进了同时多线程的研究,这是一种处理器架构技术,旨在提高在每个时钟周期发出多条指令的处理器中执行资源的利用率。 研究的目标有三个方面:(1)重新评估内存系统架构的同时多线程的工作负载;(2)调查处理器的问题,如同步方法和策略,以处理大型寄存器文件;(3)解决的影响,同时多线程的软件系统。 这项工作需要改造现有的多线程处理器的模拟器,并使用新的模拟器在评估替代品。 教育部分集中在计算机体系结构的部门课程的改造。 目前正在引进新的计算机体系结构研究生课程,同时多线程正在被纳入本科生的核心体系结构课程。 所有课程的工作正在加强与实践级模拟实验。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Dean Tullsen其他文献
Temperature-Aware DRAM Cache Management—Relaxing Thermal Constraints in 3-D Systems
温度感知 DRAM 缓存管理 — 放宽 3D 系统中的热约束
- DOI:
10.1109/tcad.2019.2927528 - 发表时间:
2020-10 - 期刊:
- 影响因子:2.9
- 作者:
Minxuan Zhou;Andreas Prodromou;Rui Wang;Hailong Yang;Depei Qian;Dean Tullsen - 通讯作者:
Dean Tullsen
Dean Tullsen的其他文献
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{{ truncateString('Dean Tullsen', 18)}}的其他基金
FoMR: Heterogeneity Under-The-Hood: Leveraging the Decoder for Highly Specialized, Programmer Transparent Microarchitectures
FoMR:底层异构性:利用解码器实现高度专业化、程序员透明的微架构
- 批准号:
1823444 - 财政年份:2018
- 资助金额:
$ 21万 - 项目类别:
Standard Grant
Context-Sensitive Decoding: Exploiting Translated ISAs for Security, Safety, Energy, and Performance
上下文相关解码:利用翻译后的 ISA 来实现安全、安全、能源和性能
- 批准号:
1652925 - 财政年份:2016
- 资助金额:
$ 21万 - 项目类别:
Standard Grant
SHF: Medium: Bridging the Software/Hardware Gap Towards Efficient, Heterogeneous, and Predictable Datacenters
SHF:中:弥合软件/硬件差距,实现高效、异构和可预测的数据中心
- 批准号:
1302682 - 财政年份:2013
- 资助金额:
$ 21万 - 项目类别:
Standard Grant
SHF:Small: Data Triggered Threads for Removing Redundant Execution and Increasing Parallelism
SHF:Small:数据触发线程,用于消除冗余执行并增加并行性
- 批准号:
1219059 - 财政年份:2012
- 资助金额:
$ 21万 - 项目类别:
Standard Grant
SHF: Small: Architectural Support for New Parallel Execution Paradigms Via Agile Threads
SHF:小型:通过敏捷线程对新并行执行范式的架构支持
- 批准号:
1018356 - 财政年份:2010
- 资助金额:
$ 21万 - 项目类别:
Standard Grant
Architectural Support for Parallelism on Multi-Core Architectures
多核架构上并行性的架构支持
- 批准号:
0702349 - 财政年份:2007
- 资助金额:
$ 21万 - 项目类别:
Standard Grant
Concurrent Optimization for Multi-Core and Multithreaded Architectures
多核和多线程架构的并发优化
- 批准号:
0541434 - 财政年份:2006
- 资助金额:
$ 21万 - 项目类别:
Continuing Grant
Compiler Optimizations to Exploit Simultaneous Multithreading
利用同步多线程的编译器优化
- 批准号:
0311683 - 财政年份:2003
- 资助金额:
$ 21万 - 项目类别:
Continuing Grant
Hardware Generation of Threads in a Multithreading Processor
多线程处理器中线程的硬件生成
- 批准号:
9808697 - 财政年份:1998
- 资助金额:
$ 21万 - 项目类别:
Continuing Grant
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