FoMR: Heterogeneity Under-The-Hood: Leveraging the Decoder for Highly Specialized, Programmer Transparent Microarchitectures

FoMR：底层异构性：利用解码器实现高度专业化、程序员透明的微架构

• 批准号: 1823444
• 负责人: Dean Tullsen
• 金额: $ 1万
• 依托单位: University of California-San Diego
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2018
• 资助国家: 美国
• 起止时间: 2018-10-01 至 2021-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1823444&HistoricalAwards=false
• 关键词: FoMR; Heterogeneity; Under; Hood; Leveraging

The need to scale computation capabilities without scaling up energy consumption is as high as ever. The one-size-fits-all computation model performs well on an average case but suffers in performance and energy efficiency for many individual applications. Customization plays a crucial role in processor design going forward. However, customization outside traditional programming and execution models has not yet fulfilled its promise. This project provides the hardware/software interface with diverse capabilities to enable the seamless adoption of heterogeneous hardware, without breaking traditional programming and execution models. This work enables new levels of specialization within the microarchitecture without disrupting the traditional general-purpose programming interface. The research team will continue increase and support workforce diversity within their department, continuing and broadening a new set of initiatives recently introduced.This project explores novel, non-intrusive, and programmer-transparent compiler, runtime, and decoder techniques that will unlock several previously unexplored hardware designs that not only offer greater throughput and efficiency for multithreaded workloads, but substantially improve existing levels of single thread performance. This work introduces two novel architectures: (1) Composite-ISA (Instruction Set Architecture) Heterogeneous Multicores that can match the gains of multi-ISA heterogeneity using a single composite-ISA derived from a large superset x86-like ISA, and (2) Context-Sensitive Decoding that leverages the internal micro-op translation feature of the modern decoders to seamlessly morph and tailor execution to changing environmental conditions, without recompilation or binary translation, and at no significant performance overhead. This level of customization is especially useful in responding to new malware threats such as the Meltdown and Spectre vulnerabilities, which could otherwise require complete hardware redesign and/or incur prohibitively high performance costs due to software/OS-based mechanisms.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

在不增加能耗的情况下扩展计算能力的需求与以往一样高。一刀切的计算模型在一般情况下表现良好，但在许多单独的应用程序中性能和能源效率会受到影响。定制在处理器设计中起着至关重要的作用。然而，传统编程和执行模型之外的定制尚未实现其承诺。该项目提供了具有多种功能的硬件/软件接口，以实现异构硬件的无缝采用，而不会破坏传统的编程和执行模型。这项工作在不破坏传统通用编程接口的情况下实现了微架构内新的专门化水平。研究团队将继续增加和支持其部门内的劳动力多样性，继续并扩大最近推出的一系列新举措。该项目探索了新颖的、非侵入式的、程序员透明的编译器、运行时和解码器技术，这些技术将解锁一些以前未开发的硬件设计，这些设计不仅为多线程工作负载提供更高的吞吐量和效率，而且大大提高了现有的单线程性能水平。这项工作引入了两种新颖的架构：(1)复合ISA（指令集架构）异构多核，可以使用来自大型超集x86类ISA的单个复合ISA来匹配多ISA异构的增益；(2)上下文敏感解码，利用现代解码器的内部微操作翻译功能，无缝地变形和定制执行，以适应不断变化的环境条件，无需重新编译或二进制转换，并且没有显著的性能开销。这种级别的定制在应对新的恶意软件威胁（如Meltdown和Spectre漏洞）时尤其有用，否则这些威胁可能需要完全重新设计硬件和/或由于基于软件/操作系统的机制而导致过高的性能成本。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

Packet Chasing: Spying on Network Packets over a Cache Side-Channel

• DOI: 10.1109/isca45697.2020.00065
• 发表时间: 2019-09
• 期刊: 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
• 作者: Mohammadkazem Taram;A. Venkat;D. Tullsen

Swivel: Hardening WebAssembly against Spectre

• 发表时间: 2021-02
• 期刊: ArXiv
• 作者: Shravan Narayan;Craig Disselkoen;D. Moghimi;Sunjay Cauligi;Evan Johnson;Zhao Gang;Anjo Vahldiek-Oberwagner;R. Sahita;H. Shacham;D. Tullsen;D. Stefan

Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA

• DOI: 10.1109/hpca.2019.00026
• 发表时间: 2019-02
• 期刊: 2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)
• 作者: A. Venkat;H. Basavaraj;D. Tullsen

Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures

解读异构 ISA 多核架构的预测调度程序

• DOI: 10.1145/3303084.3309492
• 发表时间: 2019
• 期刊: Proceedings of the 10th International Workshop on Programming Models and Applications for Multicores and Manycores
• 作者: Prodromou, Andreas;Venkat, Ashish;Tullsen, Dean M.
• 通讯作者: Tullsen, Dean M.

Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization

• DOI: 10.1145/3297858.3304060
• 发表时间: 2019-04
• 期刊: Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems
• 作者: Mohammadkazem Taram;A. Venkat;D. Tullsen