Hardware Generation of Threads in a Multithreading Processor

多线程处理器中线程的硬件生成

• 批准号: 9808697
• 负责人: Dean Tullsen
• 金额: $ 42.26万
• 依托单位: University of California-San Diego
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1998
• 资助国家: 美国
• 起止时间: 1998-09-15 至 2001-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9808697&HistoricalAwards=false
• 关键词: Hardware; Generation; Threads; Multithreading; Processor

Simultaneous Multithreaded (SMT) processors depend on thread- level parallelism (multiple jobs to run) to surpass the performance of single-threaded processors. However, single- thread performance is still important for mainstream processors. When there are only one or a few processes in the system, hardware can create threads that increase the ILP available to the SMT processor, using otherwise idle resources. This project is developing hardware thread- generation techniques to increase SMT performance in the absence of software-generated thread-level parallelism. The techniques being investigating include multiple path execution, instruction recycling, and speculative loop execution. Threaded Multiple-path Execution (TME) takes advantage of idle hardware contexts to solve the branch problem, speculatively executing multiple paths through conditional branches in a single application. Instruction Recycling increases the efficiency of multiple-path execution, as it avoids refetching instructions which are not path-dependent on a branch, and avoids re-executing instructions that are not data-dependent on the branch. Speculative Loop Parallelism speculatively executes multiple future loop iterations in parallel, using compiler analysis and dynamic hardware detection of loops and induction statements.

同时多线程（SMT）处理器依赖于线程级并行（多个作业运行）来超越单线程处理器的性能。但是，单线程性能对于主流处理器来说仍然很重要.当系统中只有一个或几个进程时，硬件可以创建线程，增加SMT处理器可用的ILP，使用其他空闲资源。这个项目正在开发硬件线程生成技术，以在缺乏软件生成的线程级并行性的情况下提高SMT性能。正在研究的技术包括多路径执行、指令回收和推测循环执行。线程化多路径执行（ThreadedMultiple-pathExecution，TME）利用空闲硬件上下文解决分支问题，在单个应用程序中通过条件分支推测性地执行多个路径。指令再循环提高了多路径执行的效率，因为它避免了重新提取与分支无关的路径指令，并且避免了重新执行与分支无关的数据指令。 推测循环并行性推测执行多个未来的循环迭代，使用编译器分析和循环和归纳语句的动态硬件检测。