ITR/SI: Integrated Design of Broadband Wireless Transceivers

[121469]第三代无线通信系统即将进行商业部署，这使得未来高速无线互联网和移动计算的发展成为无线研发议程的重中之重。众所周知，无线信道是不可靠和不稳定的。为了开发更快的无线数据网络，使其成为游牧和高度移动用户必不可少的最后一环，无线系统设计可能需要从根本上改变方法。为此，应通过统一的设计将服务质量（QoS）感知引入较低的网络层，这已被广泛认可。即使在物理层内部，发射分集、均衡和编码等单独的功能块也必须进一步集成，以更好地利用可用的信道带宽、天线分集和信道编码，以补偿未知和时变的信道失真以及同信道干扰。本提案为基于ARQ的无线数据网络的设计集成和VLSI实现提出了一个新的框架，并强调了一些关键的开放研究问题，以及许多非常有前途的解决方案。提出的项目以统一的方法设计集成宽带无线通信系统中的ARQ、发送/接收分集、均衡和信道编码。它代表了当前收发器（物理层）设计方法的明显背离，该方法分别确定和优化每个单独的功能，如信道编码、编码调制和信道均衡。PIs提议的核心思想是在发送端和接收端都利用QoS驱动的混合ARQ。该思想代表了基于混合ARQ网络设计集成的重要一步。该PIs方案关注的是在混合ARQ中，通过ARQ反馈信道实现信道均衡/预补偿、发射天线分集、（turbo）编码等物理层功能的设计协调的具体机制。他们提出的方法非常通用，不局限于特定的调制或网络标准。具体而言，他们的研究目标包括turbo编码的视频联合优化、turbo均衡、基于混合ARQ引入的时间分集的代码感知多用户检测；o用于传输分集的多用户检测算法中的Turbo均衡，该算法具有由发射机在解调器中利用的可变速率代码；o宽带空间turbo均衡结合H-ARQ分集，利用不同级别的错误保护码以及迭代可解码的多级码；o基于奇偶重传、串接、里德-所罗门（RS）外码、低密度奇偶校验（LDPC）内码和涡轮编码集成的新型II型混合ARQ。在集成均衡、LDPC和RS turbo解码的高速解码器中实现VLSI设计。o通过将Reed-Solomon码的二进制分解为状态复杂度相对较小的二进制分量码，实现低复杂度的两级turbo译码；该项目不是在分集组合、H-ARQ、均衡和编码方面单独追求渐进式的进步，而是提出了一种新的、特定的网络集成方法，这将对未来无线数据网络的设计产生重大影响。VLSI设计将代表宽带高速通信系统的最新技术。

0121469DingThe imminent commercial deployment of the 3rd generation 3rd wireless communications systems has placed the development of future high rate wireless internet and mobile computing at the top of wireless R&D agenda. Wireless channels are known to be unreliable and volatile. To develop even faster wireless data networks that can serve as the essential last link for both nomadic and highly mobile users, wireless system design may require fundamental changes in approach. To this end, it has been widely recognized that quality-of-serve (QoS) awareness should be introduced to lower network layers through a unified design. Even within the physical layer itself, separate function blocks such as transmit diversity, equalization, and coding must be further integrated to better exploit the available channel bandwidth, antenna diversity, and channel coding in order to compensate for unknown and time-varying channel distortions as well as co-channel interferences. This proposal presents a novel framework for the design integration and VLSI implementation of ARQ based wireless data networks and highlights a number of critical open research issues for investigation along with many highly promising solutions.The proposed project centers on a unified approach to the design integration of ARQ, transmit/receiver diversity, equalization, and channel coding in broadband wireless communication systems. It represents a clear departure from the current transceiver (physical layer) design approach that separately determines and optimizes each individual functionality such as channel coding, coded modulation, and channel equalization. Central to the PIs proposal is the idea to exploit the use of QoS driven hybrid ARQ at both the transmitter and the receiver. This idea represents an important step of design integration based on the network use of hybrid ARQ. The PIs proposal focuses on a specific mechanism facilitated by an ARQ feedback channel to achieve design coordination of physical layer functions of channel equalization/pre-compensation, transmit antenna diversity, (turbo) coding, amid hybrid ARQ. Their proposed approach is very general and is not limited to a specific modulation or network standard. In particular, their research objectives amid tasks includeo Joint optimization of turbo coding, turbo equalization, amid multiuser detection through code awareness based on temporal diversity introduced by hybrid ARQ;o Turbo equalization amid multiuser detection algorithms for transmit diversity with variable rate codes that are exploited by the transmitter amid demodulator;o Broadband spatial turbo equalization combined with H-ARQ diversity utilizing codes of different levels of error protection as well as iteratively decodable multilevel codes;o New type II hybrid ARQ based on integration of parity retransmission, concatenation, Reed-Solomon (RS) outer code, low-density parity check (LDPC) inner code, arid turbo coding.o VLSI design amid implementation of high speed decoders for integrated equalization, LDPC, and RS turbo decoding.o Low complexity two-stage turbo decoding of Reed-Solomon codes through their binary decomposition into binary component codes with relatively small state complexity;Rather than pursuing incremental advances separately in diversity combining, H-ARQ, equalization, and coding, this project presents a new and specific network integration approach that will have a strong impact on the design of future wireless data networks. The VLSI design amid implementation will represent the latest technology for broadband high speed communication systems.