ITR/SI: Integrated Design of Broadband Wireless Transceivers

第三代第三代无线通信系统商业部署的迫在眉睫，将未来高速无线互联网和移动计算的发展置于无线研发议程的首位。众所周知，无线信道不可靠且不稳定。为了开发更快的无线数据网络，作为游牧用户和高流动性用户的基本最后一环，无线系统设计可能需要在方法上进行根本性的改变。为此，人们普遍认识到，应通过统一设计将服务质量(QoS)感知引入较低的网络层。即使在物理层本身内，也必须进一步集成发射分集、均衡和编码等单独的功能块，以便更好地利用可用信道带宽、天线分集和信道编码，以便补偿未知和时变的信道失真以及同信道干扰。该方案为基于ARQ的无线数据网络的设计集成和VLSI实现提供了一个新的框架，并突出了一些有待研究的关键开放研究问题和许多非常有前途的解决方案。该项目的中心是宽带无线通信系统中ARQ、发送/接收分集、均衡和信道编码的统一设计集成方法。它明显背离了当前收发器(物理层)的设计方法，即分别确定和优化每个单独的功能，如信道编码、编码调制和信道均衡。PI建议的核心是利用在发射机和接收机两者处使用的服务质量驱动的混合ARQ的想法。这一思想代表了基于混合ARQ网络使用的设计集成的重要一步。PIS方案侧重于通过ARQ反馈信道促进的具体机制，以在混合ARQ中实现信道均衡/预补偿、发射天线分集、(Turbo)编码的物理层功能的设计协调。他们提出的方法非常通用，并不限于特定的调制或网络标准。特别是，他们的研究目标包括：o基于混合ARQ引入的基于时间分集的码感知在多用户检测中的Turbo编码和Turbo均衡的联合优化；o在多用户检测算法中的Turbo均衡；o用于发射分集的多用户检测算法中的Turbo均衡，发射机在解调器中利用可变速率码；o宽带空间Turbo均衡与H-ARQ分集相结合，利用不同差错保护级别的码以及可迭代译码的多级码；O基于奇偶重传、级联、里德-所罗门(RS)外码、低密度奇偶校验(LDPC)内码和Turbo编码集成的新型第二类混合ARQ。o在实现集成均衡、LDPC和RS Turbo译码的高速译码的同时进行VLSI设计。o通过将里德-所罗门码二进制分解成状态复杂度相对较小的二进制分量码，实现低复杂度的两级Turbo译码；该项目不再分别在分集合并、H-ARQ、均衡和编码方面追求递增进步，而是提出了一种新的、特定的网络集成方法，将对未来无线数据网络的设计产生重大影响。正在实施中的VLSI设计将代表宽带高速通信系统的最新技术。

0121469DingThe imminent commercial deployment of the 3rd generation 3rd wireless communications systems has placed the development of future high rate wireless internet and mobile computing at the top of wireless R&D agenda. Wireless channels are known to be unreliable and volatile. To develop even faster wireless data networks that can serve as the essential last link for both nomadic and highly mobile users, wireless system design may require fundamental changes in approach. To this end, it has been widely recognized that quality-of-serve (QoS) awareness should be introduced to lower network layers through a unified design. Even within the physical layer itself, separate function blocks such as transmit diversity, equalization, and coding must be further integrated to better exploit the available channel bandwidth, antenna diversity, and channel coding in order to compensate for unknown and time-varying channel distortions as well as co-channel interferences. This proposal presents a novel framework for the design integration and VLSI implementation of ARQ based wireless data networks and highlights a number of critical open research issues for investigation along with many highly promising solutions.The proposed project centers on a unified approach to the design integration of ARQ, transmit/receiver diversity, equalization, and channel coding in broadband wireless communication systems. It represents a clear departure from the current transceiver (physical layer) design approach that separately determines and optimizes each individual functionality such as channel coding, coded modulation, and channel equalization. Central to the PIs proposal is the idea to exploit the use of QoS driven hybrid ARQ at both the transmitter and the receiver. This idea represents an important step of design integration based on the network use of hybrid ARQ. The PIs proposal focuses on a specific mechanism facilitated by an ARQ feedback channel to achieve design coordination of physical layer functions of channel equalization/pre-compensation, transmit antenna diversity, (turbo) coding, amid hybrid ARQ. Their proposed approach is very general and is not limited to a specific modulation or network standard. In particular, their research objectives amid tasks includeo Joint optimization of turbo coding, turbo equalization, amid multiuser detection through code awareness based on temporal diversity introduced by hybrid ARQ;o Turbo equalization amid multiuser detection algorithms for transmit diversity with variable rate codes that are exploited by the transmitter amid demodulator;o Broadband spatial turbo equalization combined with H-ARQ diversity utilizing codes of different levels of error protection as well as iteratively decodable multilevel codes;o New type II hybrid ARQ based on integration of parity retransmission, concatenation, Reed-Solomon (RS) outer code, low-density parity check (LDPC) inner code, arid turbo coding.o VLSI design amid implementation of high speed decoders for integrated equalization, LDPC, and RS turbo decoding.o Low complexity two-stage turbo decoding of Reed-Solomon codes through their binary decomposition into binary component codes with relatively small state complexity;Rather than pursuing incremental advances separately in diversity combining, H-ARQ, equalization, and coding, this project presents a new and specific network integration approach that will have a strong impact on the design of future wireless data networks. The VLSI design amid implementation will represent the latest technology for broadband high speed communication systems.