Symbolic Techniques for Evaluating Complex Custom Circuits

评估复杂定制电路的符号技术

• 批准号: 0204151
• 负责人: Ruth Bahar
• 金额: $ 15.97万
• 依托单位: Brown University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2002
• 资助国家: 美国
• 起止时间: 2002-07-01 至 2007-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0204151&HistoricalAwards=false
• 关键词: Symbolic; Techniques; Evaluating; Complex; Custom

This research focuses on the development of symbolic formulations for timing and reliability analysis that can handle a wide range of custom-designed, complex circuits in an efficient, cost-effective manner. This symbolic approach enables handling of any arbitrary circuit structure and allows for an efficient means of incorporating information on the functional operation of the circuit into the analysis.Two areas are being explored: (1) Symbolic algorithms are being developed to analyze electrical noise problems due to such things as leakage currents and charge sharing. To improve accuracy, the analysis is constrained by timing and input conditions. Based on the results of this analysis, circuits may be flagged for design violations or automatically re-designed to improve electrical reliability. (2) Symbolic formulations to calculate the delay through a channel-connected region (CCR) of CMOS devices are be developed. These formulations will handle nearly all commonly-used digital circuit families, as well as handle multiple inputs transitioning and accept arbitrary input-exclusivity constraints. The goal of this work is to develop an efficient means to identify problem circuits for further analysis while avoiding the need to verify many non-realizable worst-case conditions with other more costly simulation techniques.

这项研究的重点是开发的符号公式的时序和可靠性分析，可以处理各种定制设计的，复杂的电路在一个有效的，具有成本效益的方式。这种符号化的方法可以处理任意的电路结构，并允许一个有效的手段，将信息的功能操作的电路到analysis.Two领域正在探索：（1）符号算法正在开发，以分析由于这样的事情，如泄漏电流和电荷共享的电噪声问题。 为了提高精度，分析受到时间和输入条件的约束。 基于该分析的结果，电路可以被标记为设计违规或自动重新设计以提高电气可靠性。 (2)推导了计算CMOS器件沟道连接区延迟的符号公式。这些公式将处理几乎所有常用的数字电路系列，以及处理多个输入转换和接受任意输入排他性约束。 这项工作的目标是开发一种有效的方法来识别问题电路进行进一步分析，同时避免需要验证许多不可实现的最坏情况下的条件与其他更昂贵的仿真技术。