ITR: Reconfigurable Fabric
ITR: Reconfigurable Fabric
批准号:
0205682
负责人:
Majid Sarrafzadeh
金额:
$150.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2002
资助国家:
美国
项目状态:
已结题
起止时间:
2002-09-01 至 2006-08-31
中文摘要
由于摩尔定律所预言的硅基电子技术的不断发展,计算、存储和通信现在已经融入了我们的生活。新兴的柔性电子技术,如晶体管和电线等电子元件是建立在一种薄的柔性材料上,提供了一个类似的机会,将计算、存储和通信编织到我们所穿的衣服的织物中。无缝集成大量通信计算和存储资源,配合传感器和执行器,接近人体,将改变生物医学研究和实践的许多方面。例如,可以想象在生物医学应用中,生物识别和环境传感器被编织到病人或处于医疗危急或危险环境中的人的衣服中,以触发或调节药物的输送。为了在实验室之外实现这一愿景,需要在系统级信息技术领域进行彻底的创新。如果将这些系统简单地视为基于不同的灵活外形因素的传统芯片或主板,则这些系统将无法扩展到广泛使用。相反,需要对这些系统的所有层的体系结构和设计方法进行重新思考。原因有两方面。首先,柔性材料电子产品的基础技术具有与硅和pcb电子产品非常不同的特性和计算-通信成本权衡。其次,这些系统的自然应用具有与传统系统截然不同的环境动态、物理耦合、资源约束、基础设施支持和健壮性要求。为这些系统开发所需的信息技术体系结构和设计方法的挑战之一是,人们既需要进行实验工作,又需要对问题域有一个概念性的理解。本研究研究:应用:作为驱动应用能力的使用,可重构结构(R-Fabric)基于(i)使用有机材料的柔性电子技术,以及(ii)作为电子按钮实现的计算、通信和传感元件的组合。架构:开发通用架构概念和成本/性能优化技术。我们将重点关注的问题将包括(i)组成体系结构的适当原语,(ii)针对有机电子电气特性优化的系统互连网络,(iii)应对通信与计算成本高比率的技术,以及(iv)体系结构级别的自配置和重新配置,以实现稳健的操作。编程:开发由数百个计算、存储、传感和驱动元素组成的系统的编程技术和原语,这些元素单独受到资源限制,并通过结构化但容易出错的高成本互连网络连接。处理器:开发针对这些功率受限的物理耦合应用程序进行优化的特定于领域的处理器体系结构。设计方法论:为这些系统的系统架构探索、仿真、优化和重构开发技术和混合仿真平台。
英文摘要
Because of the relentless march of the silicon-based electronics technology as predicted by Moore's Law, computation, storage, and communication are now woven into the fabrics of our lives. The emerging technology of flexible electronics, where electronics components such as transistors and wires are built on a thin flexible material, offers a similar opportunity to weave computation, storage, and communication into the fabric of the very clothing that we wear. The implications of seamlessly integrating a large number of communicating computation and storage resources, mated with sensors and actuators, in close proximity to the human body will transform many aspects of biomedical research and practice. For example, one can imagine biomedical applications where biometric and ambient sensors are woven into the garment of a patient or a person in a medically-critical or hazardous environment to trigger or modulate the delivery of a drug.To realize this vision outside the laboratory, radical innovation is required in the area of system-level information technology. These systems will not scale to widespread use if they are viewed simply as traditional chips or motherboards based on a different, flexible form factor. Rather, a rethinking of the architecture and the design methodology for all layers of these systems is needed. The reasons are two-fold. First, the underlying technology of electronics in flexible materials has characteristics and computation-communication cost trade-offs that are very different from that of silicon and PCB-based electronics. Second, the natural applications of these systems have environmental dynamics, physical coupling, resource constraints, infrastructure support, and robustness requirements that are very different from those faced by traditional systems. One of the challenges in developing the needed information technology architecture and design methodology for these systems is that one needs to both conduct experimental work and develop a conceptual understanding of the problem domain. This research studies: Application: Use as a driver application capability, reconfigurable fabric (R-Fabric) based on a combination of (i) the technology of flexible electronics using organic materials, and (ii) computing, communication, and sensing elements implemented as E-Buttons. Architecture: Develop the general architecture concepts and cost/performance optimization techniques. The issues that we will focus on will include (i) appropriate primitives for composing the architecture, (ii) system interconnect network optimized for the electrical characteristics of the organic electronics, (iii) techniques to cope with the high ration of communication to computation cost, and (iv) architecture level self-configuration and re-configuration for robust operation. Programming: Develop techniques and primitives for programming a system composed of hundreds of computation, storage, sensing, and actuation elements that are individually resource constrained and are connected by a structured but fault-prone high-cost interconnect network. Processors: Develop domain-specific processor architecture optimized for these power-constrained, physically coupled applications.Design Methodology: Develop techniques and hybrid emulation platform for systematic architecture exploration, simulation, optimization, and reconfiguration of these systems.
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