Algorithm Design for VLSI Layout
Algorithm Design for VLSI Layout
批准号:
8921540
负责人:
Majid Sarrafzadeh
金额:
$12.91万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
1990
资助国家:
美国
项目状态:
已结题
起止时间:
1990-03-15 至 1992-08-31
中文摘要
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英文摘要
The research is in four areas of IC design theory: floor-planning, global routing, wirability theory, and point dominance. In floor- planning a generalized version of the module placement problem, where the modules can assume any shape is being developed. For global routing, a generalization of sequential methods to a method, which can handle all nets in 2-D (and higher dimension) arrays simultaneously, is under investigation. A layout model that generalizes the Lipski- Preparata wirability model to include 2 and 3 layer net routing and includes more detail is being analyzed. Point dominance is a new area which builds on and integrates results in graph theory relating to layout problems. Questions about k-chains and circular k-chains are being addressed.
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