课题基金 / 基金详情

HiPHiPECS: High Level Programming of High Performance Embedded Computing Systems

HiPHiPECS: High Level Programming of High Performance Embedded Computing Systems
HiPHiPECS:高性能嵌入式计算系统的高级编程
批准号:
0306142
负责人:
Sanjay Rajopadhye
金额:
$0.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2003
资助国家:
美国
项目状态:
已结题
起止时间:
2003-07-15 至 2007-06-30

项目摘要

项目成果

Sanjay Rajopadhye的其他基金

相似基金

相关文献

中文摘要
翻译
点击翻译按钮获取中文摘要
英文摘要
0306142Sanjay RajopadhyeColorado State UniversityHiPHiPECS: High Level Prgramming of High Performance Embedded Computing Systems$497,232This project addresses curriculum development in the field of embedded computing which requires expertise from a number of disciplines: digital circuit design, VLSI, real time systems, applications, algorithms and programming. Of the two major classes of embedded systems, one consists of extremely large volumes of simple embedded systems (toasters, doorknobs, toys, controllers, etc.), and typically does not require high performance. The devices are inexpensive, mature, and stable, cross-compilation environments exist and so products can be designed and marketed fairly reliably. This project, HiPHiPECS, focuses on a related, more challenging and growing segment of the market (telephones, digital cameras, automobile sensor data processing, satellite control, information appliances, network routers, photocopiers, printers, scanners, fax machines, etc.), that require extremely high performance. Developing these high performance embedded applications necessitates the exploitation of parallelism, imposes increasingly severe constraints on bandwidth, power/energy consumption, computation time, and throughput. For such systems, there is an increasing trend towards Systems-on-a-Chip (SoC) where multiple implementation fabrics (re-configurable logic, processor cores, DSP 's and ASIC 's) are combined on a single heterogeneous chip. According to the International Technology Roadmap for Semiconductors (ITRS), there is an exponential "design gap" (the roadmap identifies this as the gap between the ability of circuit designers to effectively use silicon resources and the number of transistors available on the chip) in this area. This design gap necessitates raising the level of abstraction involved in digital circuit/system design. Although this has been identified as a need, few efforts are directed toward addressing the associated educational and training needs in a concerted manner. There is a critical need to train circuit/system designers in these skills that encompass such areas as: Expertise in the application domain (signal/image processing, networking, control systems, numerical analysis, algorithms), System engineering and design (software engineering, modularity, stepwise refinement, formal methods for correctness), Programming skills, data structures, algorithm analysis, Parallel processing (parallel algorithm theory, parallelism detection, parallel programming languages, multi-threading, data-parallelism), Operating systems, especially real-time OS, Computer architecture, instruction set architectures, DSP 's, instruction level parallelism, and SIMD architectures, Circuit level design, performance analysis, precise modeling of power/energy consumption, throughput, area and time. The main contributions of HiPHiPECS will be the development of a curriculum for high performance embedded systems. It will target FPGA based re-configurable computing platforms, since their re-configurability allows for the exploration of other implementation fabrics in a pedagogic setting. The proposed curriculum will focus on the computation-and data-intensive parts of embedded applications, primarily because this is where high performance solutions are critical, with the goal of enhancing instruction in the area of High Level Programming for High Performance Embedded Computing Systems. The project, which involves industrial collaboration, addresses a critical national need, it is founded on current research in High Performance Computing, and it represents a major shift (as opposed to an incremental change) in education in this area.
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
Co-Design for Exascale General Purpose computing on Graphics Processing Units (GPGPU)
  • 批准号:
    1240991
  • 项目类别:
    Standard Grant
  • 资助金额:
    $10.0万
  • 财政年份:
    2012
  • 负责人:
    Sanjay Rajopadhye
  • 依托单位:
International: Research Experience for US Students at INRIA - REUSSI 2
  • 批准号:
    1045885
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $10.0万
  • 财政年份:
    2010
  • 负责人:
    Sanjay Rajopadhye
  • 依托单位:
SHF: Small: Simplifying Reductions
  • 批准号:
    0917319
  • 项目类别:
    Standard Grant
  • 资助金额:
    $46.62万
  • 财政年份:
    2009
  • 负责人:
    Sanjay Rajopadhye
  • 依托单位:
CPA-CPL: The Reduction Simplification Engine
  • 批准号:
    0811852
  • 项目类别:
    Standard Grant
  • 资助金额:
    $0.0万
  • 财政年份:
    2008
  • 负责人:
    Sanjay Rajopadhye
  • 依托单位:
国内基金
海外基金
粒子level set方法的改进与空间自适应波浪模型并行化研究
  • 批准号:
    52171245
  • 项目类别:
    面上项目
  • 资助金额:
    58万元
  • 批准年份:
    2021
  • 负责人:
    黄筱云
  • 依托单位:
基于Level Set方法的三维爆炸与冲击仿真软件开发及其应用
  • 批准号:
    11502121
  • 项目类别:
    青年科学基金项目
  • 资助金额:
    25.0万元
  • 批准年份:
    2015
  • 负责人:
    张莉
  • 依托单位:
层级稀疏化的Mid-Level特征空间下高分辨率遥感影像检索方法研究
基于新LEVEL SET方法的双标量小火焰模型的研究
  • 批准号:
    51306013
  • 项目类别:
    青年科学基金项目
  • 资助金额:
    25.0万元
  • 批准年份:
    2013
  • 负责人:
    刘英杰
  • 依托单位: