Control-Flow Processors

控制流处理器

• 批准号: 0429843
• 负责人: Eric Rotenberg
• 金额: $ 17.5万
• 依托单位: North Carolina State University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2004
• 资助国家: 美国
• 起止时间: 2004-09-01 至 2008-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0429843&HistoricalAwards=false
• 关键词: Control; Flow; Processors

Control-Flow ProcessorsAbstractAn architecture is presented that unifies fine-grain control-flow and data-flow dependences in the context of contemporary superscalar processors, preserving highly streamlined mechanisms of superscalar processors while endowing them with dataflow properties. Future independent instructions are fetched, executed, and locally finalized, their results propagated and corresponding resources freed, and their cumulative effects sustained regardless of prior unresolved branch mispredictions. Branch mispredictions no longer serialize execution, leaving exceptions and finite resources as the only remaining serializing constraints in the system.In the domain of high-performance microprocessors (which power supercomputers, personal computers, laptops, and even cell phones), there remain a few dogged bottlenecks that fundamentally constrain performance, making it difficult to translate the potential of additional transistors into effective performance gains. The project's broader significance is an approach that aims to overcome one of the remaining grand-challenge problems in scaling microprocessor performance.

控制流处理器摘要提出了一种在当代超标量处理器的环境中统一细粒度控制流和数据流依赖的体系结构，保留了超标量处理器的高度精简的机制，同时赋予它们数据流属性。未来的独立指令被获取、执行和本地完成，它们的结果被传播并且相应的资源被释放，并且它们的累积效果保持不变，而不考虑先前未解决的分支错误预测。分支错误预测不再序列化执行，使得异常和有限资源成为系统中仅存的序列化约束。在高性能微处理器领域(超级计算机、个人计算机、笔记本电脑甚至手机)，仍然存在一些顽固的瓶颈，从根本上限制了性能，使额外晶体管的潜力难以转化为有效的性能提升。该项目更广泛的意义是一种旨在克服微处理器性能扩展中剩余的重大挑战之一的方法。