Virtual Simple Architecture (VISA): Exceeding the Complexity Limit in Safe Real-Time Systems

虚拟简单架构 (VISA)：超越安全实时系统的复杂性限制

• 批准号: 0310860
• 负责人: Eric Rotenberg
• 金额: $ 27.5万
• 依托单位: North Carolina State University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2003
• 资助国家: 美国
• 起止时间: 2003-08-15 至 2007-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0310860&HistoricalAwards=false
• 关键词: Virtual; Simple; Architecture; VISA; Exceeding

RotenbergVirtual Simple Architecture (VISA): Exceeding the Complexity Limit in Safe Real-Time SystemsAbstractThis project resolves a long-standing problem in embedded systems: bounding the worst-case execution times (WCET) of tasks on contemporary processors. WCETs are essential for real-time scheduling; yet deriving them for contemporary processors is intractable. The Virtual Simple Architecture (VISA) framework shifts the burden of bounding the WCETs of tasks, in part, to hardware. A VISA is the pipeline timing specification of a hypothetical simple processor. WCET is derived for a task assuming the VISA. At run-time, the task is executed speculatively on an unsafe complex processor, and its progress is continuously gauged. If continued safe progress appears to be in jeopardy, the complex processor is reconfigured to a simple mode of operation that directly implements the VISA, thereby explicitly bounding the task's overall execution time by the WCET.VISA provides a general framework for safe operation on unsafe processors, setting up new opportunities for exploiting higher performance in embedded systems.The project anticipates and contributes to a major shift in computing (the kind that occurs once every decade), thus helping to preserve the nation's leadership in this area. Computers have always evolved by integrating higher levels of complexity and performance into smaller systems. In the 1990s, this evolution led to highly functional personal computers (PC) with supercomputer-like performance. Now, in the post-PC era, users interact with embedded computers continuously, transparently, and in real time (e.g., cell phones, cars, airplanes, appliances, industry/military applications, etc.). This project radically increases the performance, functionality, and reliability of embedded systems, which are vital to the day-to-day functioning of our society.

Rotenberg虚拟简单体系结构(VISA)：超过安全实时系统的复杂性限制摘要这个项目解决了嵌入式系统中长期存在的一个问题：在当代处理器上限制任务的最坏情况执行时间(WCET)。WCET对于实时调度是必不可少的；然而，为当代处理器派生WCET是一件棘手的事情。虚拟简单体系结构(VISA)框架将约束任务的WCET的负担部分转移到硬件上。VISA是假想的简单处理器的流水线时序规范。WCET是为假设签证的任务而推导的。在运行时，任务在不安全的复杂处理器上推测性地执行，并持续测量其进度。如果持续的安全进展看起来岌岌可危，复杂的处理器被重新配置为简单的操作模式，直接实现VISA，从而明确地限制任务的总体执行时间。VISA为不安全的处理器上的安全操作提供了一个通用框架，为利用嵌入式系统的更高性能创造了新的机会。该项目预计并有助于计算的重大转变(每十年发生一次)，从而帮助保持国家在这一领域的领先地位。计算机总是通过将更高级别的复杂性和性能集成到更小的系统中而发展起来的。在20世纪90年代，这种演变导致了具有超级计算机般的性能的高功能个人计算机(PC)。现在，在后PC时代，用户与嵌入式计算机连续、透明和实时地交互(例如，手机、汽车、飞机、家用电器、工业/军事应用等)。这个项目从根本上提高了嵌入式系统的性能、功能和可靠性，这对我们社会的日常运作至关重要。