SHF: Small: Design for Competitive Automated Layout (DCAL) of Mobile Application Processors

智能手机、平板电脑和其他移动设备正在改变人们工作、娱乐和互动的方式。它们的移动性、与云的连接以及传感器、计算和通信的集成激发了不久前无法预见的独特应用。随着应用程序融合不同的输入以提供新水平的态势感知和嵌入式智能，未来的前景更加广阔。为了推动这个快速增长的市场，为移动设备提供动力的处理器必须比传统计算机的处理器设计得更快，即使移动处理器的复杂性已经接近台式机和服务器处理器。通过从第三方获得最新处理器（称为软核）的硬件描述许可，并将它们与专有设计集成到一个整体的片上系统，产品开发得以加速。不幸的是，还有一个额外的步骤会削弱通过授权软核获得的生产力收益。软芯必须转换成硬芯，即可以在半导体代工厂制造的电路布局。制作高质量的布局是一个艰苦的手工过程，需要专业知识。另外，可以使用自动合成和放置和布线（SPR）工具，但是它们产生的布局较差，性能和功耗低于标准。本研究将自动排版的便利性与手工排版的高质量相结合。关键的创新是不要在自动化上妥协——必须使用SPR——而是修改移动处理器的设计，使SPR能够产生与手动布局相当的高质量布局。也就是说，移动处理器在设计时就知道SPR将被使用。这种新模式被称为竞争性自动布局设计（DCAL）。DCAL在多个层面上应用了一种新颖的设计策略，使SPR能够产生具有竞争力的布局。所有级别的一个共同主题是重构或消除SPR处理不良的处理器复杂性来源。(1)电路级DCAL：高端口的存储结构传统上需要大量的手工布局。更糟糕的是，现代处理器中有很多这样的处理器。这些被重新构造以实现高质量的布局，而不需要人工的努力。(2)微体系结构级DCAL：对最具挑战性的处理器单元进行重构，使满足时序关闭的激进电路和布局优化变得不必要。(3)核心级DCAL：设计一个在任意程序阶段都表现良好的单一微架构是复杂性的重要来源。核心级DCAL将程序行为划分为有用的类，并为这些类提供专用的核心设计；核心针对目标行为进行了精简，使SPR能够产生高质量的物理设计。(4) ISA级DCAL：为了跨许多不同处理器的可移植性，移动设备软件通常使用不对应于任何特定处理器ISA的虚拟指令集架构（ISA）进行分发。将虚拟ISA实时转换为处理器ISA的先决条件是为一种或多种核心类型临时修改处理器ISA，目的是进一步简化SPR的核心，以生成高质量的物理设计。DCAL的经济和社会效益是实实在在的。自动化加速了创新，因为它允许公司更多地专注于开发更丰富的用户体验，而不是让这一切成为可能的底层技术。此外，自动化将这项技术交到更多的人手中，包括那些没有专业知识的人和小型灵活的设计团队。公司和日常用户都从更多的创新产品更快地推向市场这一事实中获利。

Smart phones, tablet computers, and other mobile devices are transforming the way people work, play, and interact. Their mobility, connection to the cloud, and integration of sensors, computation and communication have inspired unique applications unforeseen just a short time ago. The future holds even greater promise, as applications fuse diverse inputs to deliver new levels of situation awareness and embedded intelligence. To fuel this rapidly growing market, the processors that power mobile devices must be designed more quickly than processors in conventional computers, even as the complexity of mobile processors approaches that of desktop and server processors. Product development is accelerated by licensing hardware descriptions of the latest processors - called soft cores - from third parties, and integrating them with proprietary designs into an overall system-on-chip. Unfortunately, there is an additional step that erodes the productivity gains won by licensing soft cores. A soft core must be converted into a hard core, i.e., a circuit layout that can be fabricated in a semiconductor foundry. Producing a high-quality layout is a painstaking, manual process requiring niche expertise. Alternatively, automated synthesis and place-and-route (SPR) tools can be used, but they produce poor layouts with sub-par performance and power consumption.This research combines the convenience of automated layout with the quality of manual layout. The key innovation is to not compromise on automation - SPR must be used - but rather to modify the design of mobile processors so that SPR is able to produce a quality layout on par with manual layout. That is, the mobile processor is designed with the knowledge that SPR is going to be used. This new paradigm is called Design for Competitive Automated Layout (DCAL). DCAL applies a novel regimen of design strategies at multiple levels that enables SPR to produce competitive layouts. A common theme across all levels is to restructure or eliminate sources of processor complexity that SPR handles poorly. (1) Circuit-level DCAL: Highly-ported memory structures traditionally require intense manual layout. Making matters worse, there are many of them in a modern processor. These are restructured to achieve quality layouts without manual effort. (2) Microarchitecture-level DCAL: The most challenging processor units are restructured so that aggressive circuit and layout optimizations for meeting timing closure are rendered unnecessary. (3) Core-level DCAL: Designing a single microarchitecture that performs well across arbitrary program phases is a significant source of complexity. Core-level DCAL divides program behaviors into useful classes and provides dedicated core designs for these classes; the cores are streamlined for the targeted behaviors, enabling SPR to produce quality physical designs. (4) ISA-level DCAL: For portability across many different processors, mobile device software is often distributed using a virtual instruction-set-architecture (ISA) that does not correspond to any particular processor ISA. The prerequisite for translating the virtual ISA into a processor ISA on-the-fly opens the door to improvising on the processor's ISA for one or multiple core types, with the aim of further streamlining cores for SPR to generate quality physical designs.The economic and societal benefits of DCAL are tangible. Automation accelerates innovation by allowing companies to focus more on developing richer user experiences and less on low-level technology that makes it all possible. Moreover, automation puts this technology into the hands of more people, including folks without niche expertise and small nimble design teams. Both companies and everyday users profit from the fact that more innovative products are being delivered to market sooner.