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CAREER: Variational Methods for Design Complexity in Nanometer VLSI Circuit

CAREER: Variational Methods for Design Complexity in Nanometer VLSI Circuit
职业:纳米 VLSI 电路设计复杂性的变分方法
批准号:
0447900
负责人:
Janet Roveda
金额:
$0.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2005
资助国家:
美国
项目状态:
已结题
起止时间:
2005-03-15 至 2011-02-28

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英文摘要
0447900Janet WangUniversity of ArizonaCAREER: Variational Methods for Design Complexity in Nanometer VLSI CircuitThe growing design complexity of nanometer scale (component length ~ 10-9 m) VLSI/ULSI (Very- and Ultra-Large-System-Integration) circuits cause escalating research/design costs that are likely to hinder the creation of cheaper and faster computer processors. To illustrate, the current Complementary-Metal-Oxide-Semiconductors (CMOS) processes requires complicated physical modeling in order to accurately predict the performance of the fabricated product. Process variation, couplingcapacitance, mutual inductance, and MOSFET leakage currents are jargon-specific concepts for such intricate physical details peculiar to components (e.g. gates) of very small (~ 10-9 m) physical dimensions.These time-variant, unsteady effects induce severe uncertainties /Bin the operating speed of the cicuit, in the integrity of the pre- and post-circuit signal, in the power consumption, and in the distributionof undesirable hot-spots within the circuit architecture. The PI strives to alleviate design cost through the creation of Electronics Design Automation (EDA) tools that benefit from specialized variational analysis techniques. As the acronym implies, EDA toolsautomate many steps of the circuit design and reduce the complexity workload for the design engineer. Thi s CAREER proposal outlines a hybrid research/education program for The University of Arizona atTucson. The research program is expected to generate indispensable and applicable knowledge in modeling , design, and verification of increasingly complex ULSI circuits whereas the educational componentendeavors to train students in the creation, upgrade, and maintenancy of future EDA tools. The following technological broader impacts are likely to manifest themselves through the proposed research. Animproved ratio of functional to defective units in a microprocessor batch (yield production) would translate into immense revenue savings for high volume manufactures. Chip circuit designers may have theoption to adjust important design parameters (e.g. chip clock frequency) to maximize the performance of the processor. The ability to predict full chip/package temperature profile would allow the elim ination ofhot-spots that negatively affect the performance of the circuit. Advanced EDA tools would automate complex design rules and streamline the design decision process for upcoming new bio- and nano- materials.The increased availability of under- and post-graduate cutting-edge electronics eduction for women and minority constitutes an important social broader impact that provides these sectors with skills to competein the high-end Integrated Circuit (IC) design industry within the next 20 years.
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IUCRC Phase I UArizona: Center to Stream Healthcare In Place (C2SHIP)
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    2052528
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    Continuing Grant
  • 资助金额:
    $112.5万
  • 财政年份:
    2021
  • 负责人:
    Janet Roveda
  • 依托单位:
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  • 批准号:
    1953473
  • 项目类别:
    Standard Grant
  • 资助金额:
    $5.0万
  • 财政年份:
    2020
  • 负责人:
    Janet Roveda
  • 依托单位:
Planning IUCRC University of Arizona: Center of Stream Healthcare In Place (SHIP)
  • 批准号:
    1747734
  • 项目类别:
    Standard Grant
  • 资助金额:
    $1.5万
  • 财政年份:
    2018
  • 负责人:
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  • 依托单位:
I-Corps Team: New Tool for Sleep Apnea Screening
  • 批准号:
    1759644
  • 项目类别:
    Standard Grant
  • 资助金额:
    $5.0万
  • 财政年份:
    2018
  • 负责人:
    Janet Roveda
  • 依托单位:
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