CAREER: Variational Methods for Design Complexity in Nanometer VLSI Circuit

职业：纳米 VLSI 电路设计复杂性的变分方法

• 批准号: 0447900
• 负责人: Janet Roveda
• 金额: --
• 依托单位: University of Arizona
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2005
• 资助国家: 美国
• 起止时间: 2005-03-15 至 2011-02-28
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0447900&HistoricalAwards=false
• 关键词: CAREER; Variational; Methods; Design; Complexity

0447900Janet WangUniversity of ArizonaCAREER: Variational Methods for Design Complexity in Nanometer VLSI CircuitThe growing design complexity of nanometer scale (component length ~ 10-9 m) VLSI/ULSI (Very- and Ultra-Large-System-Integration) circuits cause escalating research/design costs that are likely to hinder the creation of cheaper and faster computer processors. To illustrate, the current Complementary-Metal-Oxide-Semiconductors (CMOS) processes requires complicated physical modeling in order to accurately predict the performance of the fabricated product. Process variation, couplingcapacitance, mutual inductance, and MOSFET leakage currents are jargon-specific concepts for such intricate physical details peculiar to components (e.g. gates) of very small (~ 10-9 m) physical dimensions.These time-variant, unsteady effects induce severe uncertainties /Bin the operating speed of the cicuit, in the integrity of the pre- and post-circuit signal, in the power consumption, and in the distributionof undesirable hot-spots within the circuit architecture. The PI strives to alleviate design cost through the creation of Electronics Design Automation (EDA) tools that benefit from specialized variational analysis techniques. As the acronym implies, EDA toolsautomate many steps of the circuit design and reduce the complexity workload for the design engineer. Thi s CAREER proposal outlines a hybrid research/education program for The University of Arizona atTucson. The research program is expected to generate indispensable and applicable knowledge in modeling , design, and verification of increasingly complex ULSI circuits whereas the educational componentendeavors to train students in the creation, upgrade, and maintenancy of future EDA tools. The following technological broader impacts are likely to manifest themselves through the proposed research. Animproved ratio of functional to defective units in a microprocessor batch (yield production) would translate into immense revenue savings for high volume manufactures. Chip circuit designers may have theoption to adjust important design parameters (e.g. chip clock frequency) to maximize the performance of the processor. The ability to predict full chip/package temperature profile would allow the elim ination ofhot-spots that negatively affect the performance of the circuit. Advanced EDA tools would automate complex design rules and streamline the design decision process for upcoming new bio- and nano- materials.The increased availability of under- and post-graduate cutting-edge electronics eduction for women and minority constitutes an important social broader impact that provides these sectors with skills to competein the high-end Integrated Circuit (IC) design industry within the next 20 years.

[447900] janet wang亚利桑那大学研究领域：纳米级VLSI电路设计复杂性的变分方法纳米级（元件长度~ 10-9米）VLSI/ULSI（超大和超大系统集成）电路的设计复杂性不断增加，导致研究/设计成本不断上升，这可能会阻碍创造更便宜、更快的计算机处理器。为了说明这一点，目前的互补金属氧化物半导体（CMOS）工艺需要复杂的物理建模，以便准确预测制造产品的性能。工艺变化，耦合电容，互感和MOSFET泄漏电流是术语特定的概念，用于非常小（~ 10-9米）物理尺寸的组件（例如栅极）所特有的复杂物理细节。这些时变的非定常效应在电路的运行速度、电路前后信号的完整性、功耗以及电路结构中不希望出现的热点分布等方面引起了严重的不确定性。PI努力通过创建电子设计自动化（EDA）工具来降低设计成本，这些工具受益于专业的变分分析技术。顾名思义，EDA工具自动化了电路设计的许多步骤，减少了设计工程师的复杂工作量。这份职业计划书概述了亚利桑那大学亚利桑那分校的混合研究/教育计划。该研究计划旨在为日益复杂的ULSI电路的建模、设计和验证提供不可或缺的实用知识，而教育部分则致力于培养学生在未来EDA工具的创建、升级和维护方面的能力。以下技术更广泛的影响很可能通过拟议的研究表现出来。微处理器批次（成品率生产）中功能单元与缺陷单元比率的提高将为大批量制造商带来巨大的收入节省。芯片电路设计人员可以选择调整重要的设计参数（例如芯片时钟频率），以最大限度地提高处理器的性能。预测全芯片/封装温度分布的能力将允许消除对电路性能产生负面影响的热点。先进的EDA工具将自动化复杂的设计规则，并简化即将推出的新型生物和纳米材料的设计决策过程。为女性和少数民族提供的本科和研究生尖端电子教育的增加构成了重要的社会广泛影响，为这些部门提供了在未来20年内参与高端集成电路（IC）设计行业竞争的技能。