Signal Processing Enhanced DACs for Wideband Communication Systems

适用于宽带通信系统的信号处理增强型 DAC

• 批准号: 0515286
• 负责人: Ian Galton
• 金额: $ 23.57万
• 依托单位: University of California-San Diego
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2005
• 资助国家: 美国
• 起止时间: 2005-09-01 至 2008-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0515286&HistoricalAwards=false
• 关键词: Signal; Processing; Enhanced; DACs; Wideband

The relentless progress of communication system technology toward increased bandwidth and decreased unit cost has been enabled by increasingly sophisticated digital signal processing made possible by the perpetuation of Moore's Law. Nevertheless, communication systems based on digital signal processing inevitably require certain high-performance analog circuit blocks, and the accuracy required of these blocks will increase as communication standards continue to evolve. Unfortunately, in perpetuating Moore's Law integrated circuit (IC) technology trade-offs are necessary that favor digital circuitry over analog circuitry; high-performance analog circuits are increasingly difficult to implement as IC technology is scaled. Thus, there is a fundamental disconnect between the requirements of present and future high-performance communications and the evolution of the semiconductor electronics industry.This research addresses an important aspect of this problem by developing digital signal processing enhancement techniques that enable high-resolution, high-bandwidth digital-to-analog converters (DACs) which are critical components in wideband communication transmitters. Presently, such DACs are limited by component mismatches inevitably introduced during IC fabrication and by other non-ideal circuit effects that introduce nonlinear transient distortion. The goal of the research is to develop digital signal processing algorithms that mitigate these problems. The research consists of four tightly-coupled components: 1) the development of an ultra-efficient dynamic element matching (DEM) technique for eliminating harmonic distortion caused by component mismatches, 2) the development of an adaptive noise cancellation technique that augments the DEM to reduce SNR degradation caused by component mismatches, 3) the development of an interpolation technique to mitigate the nonlinear transient problem, and 4) the development of a CMOS integrated circuit prototype with record-setting performance as a proof-of-principle and to provide feedback with which to guide the theoretical work.

通信系统技术朝着增加带宽和降低单位成本的方向不断发展，这是由于摩尔定律的永久化使得越来越复杂的数字信号处理成为可能。 然而，基于数字信号处理的通信系统不可避免地需要某些高性能模拟电路块，并且随着通信标准的不断发展，这些块所需的精度将增加。 不幸的是，在使摩尔定律永久化的过程中，集成电路（IC）技术的权衡是必要的，其有利于数字电路而不是模拟电路;随着IC技术的规模化，高性能模拟电路越来越难以实现。 因此，有一个根本性的断开之间的要求，现在和未来的高性能通信和半导体电子industrial.This研究解决了这个问题的一个重要方面，通过开发数字信号处理增强技术，使高分辨率，高带宽的数字到模拟转换器（DAC），这是宽带通信发射机中的关键部件。 目前，这种DAC受到IC制造过程中不可避免地引入的元件失配以及引入非线性瞬态失真的其他非理想电路效应的限制。 该研究的目标是开发数字信号处理算法，以减轻这些问题。 该研究由四个紧密耦合的组成部分组成：1）开发用于消除由分量失配引起的谐波失真的超高效动态元件匹配（DEM）技术，2）开发增强DEM以减少由分量失配引起的SNR降级的自适应噪声消除技术，3）开发内插技术以减轻非线性瞬态问题，以及4）开发具有创纪录性能的CMOS集成电路原型，作为原理证明，并提供反馈以指导理论工作。