CIF: Small: Enabling Dynamic Error Cancellation in High-Resolution RF DACs

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By 2025, next-generation (5G) mobile communication systems are expected to handle an astonishing 1000-fold increase in data traffic, a 100-fold increase in subscribers, and a several orders of magnitude reduction in energy consumption relative to existing systems. While the potential economic benefits of 5G communication systems are enormous, fully realizing the benefits will require overcoming key technological limitations, most of which relate to operating at far higher maximum frequencies and over far wider bandwidths than existing systems. The multi-decade exponential scaling trend of integrated circuit (IC) technology toward extremely high-density and low-power digital circuitry has enabled powerful digital signal processing (DSP) techniques that will play a large role in overcoming these limitations. Yet no matter how much DSP is applied, the signals to be transmitted are ultimately analog, so analog signal generation, usually via radio frequency digital-to-analog converters (RF DACs), is always required. Unfortunately, RF DACs with high-enough accuracies and bandwidths for next generation communication system infrastructure, such as 5G base stations, are beyond present day capabilities. Solving this problem is the focus of the project, thereby helping realize the full potential of advanced wireless networks.The project will address the problem by developing and experimentally validating a new class of mixed-signal calibration techniques for RF DACs. While prior calibration techniques are widely used to enhance the performance of many critical RF and mixed-signal communication system circuit blocks, such as analog-to-digital converters and frequency synthesizers, they have had limited success to date in improving RF DAC performance. This is because RF DACs are limited by both static and dynamic errors, but prior calibration techniques only address static error. As dynamic error tends to increase with an RF DAC's bandwidth, it presents a fundamental limitation in high-speed communication applications. In contrast, the calibration techniques to be developed under this project adaptively cancel both static and dynamic error. Three related calibration techniques will be developed that together cancel the most significant types of error in RF DACs: those caused by 1) clock skew and component mismatches, 2) inter-symbol interference, and 3) signal-dependent output impedance. The techniques will be validated experimentally via the development of two IC prototypes that target RF DAC performance well beyond the present state-of-the-art. The primary focus of the project is theoretical: the development and optimization of enabling new signal processing techniques and their rigorous mathematical analyses. Nevertheless, the IC development portion of the project is essential in that it will provide feedback to guide the theoretical work and will provide a definitive means of evaluating the project's success.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.