CIF: Small: Digital Mitigation of Spurious Tones in Fractional-N PLLs

分数n锁相环（pll）是大多数现代无线通信系统（包括蜂窝电话和无线局域网）中的关键部件。不幸的是，传统锁相环引入的误差包含被称为杂散音调的周期干扰，只有通过增加功耗和成本的技术才能充分抑制典型的无线应用。此外，随着集成电路（IC）技术继续向更小的尺寸扩展，这些技术变得不那么有效。因此，伪音问题会对无线通信系统的功耗、成本和可制造性产生负面影响，而且随着IC技术随着摩尔？年代法律。传统锁相环中的ÄÓ调制器是产生杂音的根本原因。当ÄÓ调制器？锁相环的量化噪声受到非理想电路特性的非线性影响。这项研究的目标是开发一种ÄÓ调制器替代品，称为连续要求器，以避免这个问题。连续需求器的工作原理与ÄÓ调制器不同，其量化噪声不易受到非线性诱导的杂散音的影响。研究任务是：1)进一步发展连续需求器的理论基础，以提高其性能；2)研究如何在电路层面优化锁相环，以利用连续需求器对非线性失真的降低灵敏度。3)开发一个概念验证的分数n锁相环IC，该IC符合苛刻的无线标准，如IEEE 802.16，并且在最小化功耗和电路面积方面超过了目前的技术水平。

CIF: Small: Digital Mitigation of Spurious Tones in Fractional-N PLLsFractional-N phase locked loops (PLLs) are critical components in most modern wireless communication systems including cellular telephones and wireless local area networks. Unfortunately, the error introduced by conventional PLLs contains period disturbances referred to as spurious tones, which only can be suppressed sufficiently for typical wireless applications with techniques that increase power consumption and cost. Furthermore, these techniques become less effective as integrated circuit (IC) technology continues to scale to smaller dimensions. Therefore, the spurious tone problem negatively affects power consumption, cost, and manufacturability of wireless communication systems, and the problem gets worse as IC technology scales with Moore?s Law.The ÄÓ modulator in a conventional PLL is the fundamental cause of spurious tones. The spurious tones are induced when the ÄÓ modulator?s quantization noise is subjected to nonlinearity from non-ideal circuit behavior in the PLL. The goal of this research is to develop a ÄÓ modulator replacement, called a successive requantizer, that avoids this problem. The successive requantizer has a different principle of operation than a ÄÓ modulator and its quantization noise is much less susceptible to nonlinearity-induced spurious tones. The research tasks are 1) to further develop the theory underlying successive requantizers to improve their performance, 2) to investigate how PLLs can be optimized at the circuit level to take advantage of the reduced sensitivity to nonlinear distortion offered by successive requantizers, and 3) to develop a proof-of-concept fractional-N PLL IC enabled by the theoretical results of the project that is compliant with a demanding wireless standard such as IEEE 802.16 and exceeds the present state of the art in terms of minimizing power consumption and circuit area.