International Symposium on High Dielectric Constant Gate Stacks will be held in Los Angeles, California on October 16-21, 2005.

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ECS-0535679This proposal requests funds to support the International Symposium on HIGHDIELECTRIC CONSTANT GATE STACKS III to be held as part of 208th Meeting ofThe Electrochemical Society, Inc. Los Angeles, California, October 16-21, 2005. Morespecifically, the funds requested ($3,955.00) will be utilized for partial support of thetravel expenses for up to five deserving graduate/undergraduate students and registrationwaiver for only 3 invited speakers out of 25 confirmed invited speakers.This symposium will address the fundamental science and recent technologies ofadvanced gate stacks for complementary metal-oxide-semiconductor (CMOS) andmemory applications in sub-65 nm feature size integrated circuits, including: (1)Substrates: Higher mobility semiconductors such as strained Si, Si(110) and (111), SiGe,Ge and III-V compounds, GeOI, GaAs-on-insulator, and SOI. (2) High k Gate DielectricMaterials and Processing: Trends in high k gate dielectric technologies for 65 nm andbeyond, novel high k materials, advanced oxynitrides for 65 nm and beyond, high k gatedielectric growth techniques, high k gate dielectric deposition methods, advancedprecursors for CVD. (3) Gate Electrode Materials and Processing: Trends in gateelectrode technologies for 65 nm and beyond; poly-Si, silicided, and metal gateelectrodes, band-edge and midgap work-function materials, gate electrode depositionmethods. (4) High K Gate Dielectric Interfaces: Silicon/High-K and High-K/Gate-Electrode Interfaces Oxygen Diffusion and Mechanisms of Interface Layer FormationInterface Preparation, Passivation, Engineering, and Control. (5) Advanced Gate StackReliability: Identification of Main Reliability Problems in Low Voltage Application andNew Reliability Models Bias Temperature Instability Metallic Cross-ContaminationAcross Layers Mechanisms of Electron Mobility Degradation Thermal Stability of NewMaterials. (6) High K Gate Dielectric Characterization and Methodologies: AdvancedPhysical, Chemical, and Electrical Characterization of Gate Stacks AccurateDetermination of Dielectric Capacitance Trap Parameter Extraction Non-ContactElectrical Characterization Work-function Extraction Methodologies Determination ofTunneling Electron/Hole Mass. (7) DRAM and Non-Volatile Memory Materials: Trendsin High K DRAM Capacitor Technologies Electrode/Dielectric Chemical InteractionsThermal Stability of Structures Non-Volatile and Novel Memory Applications.