International Symposium on High Dielectric Constant Gate Stacks will be held in Los Angeles, California on October 16-21, 2005.

ECS-0535679本提案请求提供资金，以支持将于2005年10月16-21日在加利福尼亚州洛杉矶举行的国际高密度电子控制恒定栅堆叠国际研讨会III，这是电化学学会第208次会议的一部分。具体来说，申请的资金(3,955.00美元)将用于部分支持最多5名应得的研究生/本科生的旅行费用，以及在25位已确认的特邀演讲者中只有3位获得注册豁免。本次研讨会将讨论用于互补金属氧化物半导体(CMOS)的先进栅堆叠的基础科学和最新技术，以及在低于65 nm特征尺寸集成电路中的存储器应用，包括：(1)衬底：迁移率更高的半导体，如应变Si、Si(110)和(111)、SiGe、Ge和III-V化合物、GeOI、GaAs-On绝缘体和SOI。(2)高k栅电介质材料与工艺：65 nm及以上高k栅电介质技术的发展趋势，新型高k材料，65 nm及以上的先进氮氧化物，高k栅电介质生长技术，高k栅电介质沉积方法，先进的化学气相沉积前驱体。(3)栅电极材料与加工：65 nm及以上栅电极技术的发展趋势；多晶硅、硅化物和金属栅电极、带边和中间带隙功函数材料、栅电极沉积方法。(4)高K栅电介质界面：硅/高K和高K/栅电极界面氧扩散及界面层形成机理界面制备、钝化、工程与控制。(5)先进栅堆可靠性：低电压应用中主要可靠性问题的识别和新的可靠性模型偏置温度不稳定性金属交叉污染电子迁移率退化的跨层机理新材料的热稳定性。(6)高K栅电介质特性和方法：栅堆栈的高级物理、化学和电特性精确确定介质电容陷阱参数提取非接触电特性功函数提取方法确定隧道电子/空穴质量。(7)动态随机存取存储器和非易失性存储材料：高K动态随机存取存储器电容器技术的趋势电极/介电化学相互作用结构的热稳定性非易失性和新型存储应用。

ECS-0535679This proposal requests funds to support the International Symposium on HIGHDIELECTRIC CONSTANT GATE STACKS III to be held as part of 208th Meeting ofThe Electrochemical Society, Inc. Los Angeles, California, October 16-21, 2005. Morespecifically, the funds requested ($3,955.00) will be utilized for partial support of thetravel expenses for up to five deserving graduate/undergraduate students and registrationwaiver for only 3 invited speakers out of 25 confirmed invited speakers.This symposium will address the fundamental science and recent technologies ofadvanced gate stacks for complementary metal-oxide-semiconductor (CMOS) andmemory applications in sub-65 nm feature size integrated circuits, including: (1)Substrates: Higher mobility semiconductors such as strained Si, Si(110) and (111), SiGe,Ge and III-V compounds, GeOI, GaAs-on-insulator, and SOI. (2) High k Gate DielectricMaterials and Processing: Trends in high k gate dielectric technologies for 65 nm andbeyond, novel high k materials, advanced oxynitrides for 65 nm and beyond, high k gatedielectric growth techniques, high k gate dielectric deposition methods, advancedprecursors for CVD. (3) Gate Electrode Materials and Processing: Trends in gateelectrode technologies for 65 nm and beyond; poly-Si, silicided, and metal gateelectrodes, band-edge and midgap work-function materials, gate electrode depositionmethods. (4) High K Gate Dielectric Interfaces: Silicon/High-K and High-K/Gate-Electrode Interfaces Oxygen Diffusion and Mechanisms of Interface Layer FormationInterface Preparation, Passivation, Engineering, and Control. (5) Advanced Gate StackReliability: Identification of Main Reliability Problems in Low Voltage Application andNew Reliability Models Bias Temperature Instability Metallic Cross-ContaminationAcross Layers Mechanisms of Electron Mobility Degradation Thermal Stability of NewMaterials. (6) High K Gate Dielectric Characterization and Methodologies: AdvancedPhysical, Chemical, and Electrical Characterization of Gate Stacks AccurateDetermination of Dielectric Capacitance Trap Parameter Extraction Non-ContactElectrical Characterization Work-function Extraction Methodologies Determination ofTunneling Electron/Hole Mass. (7) DRAM and Non-Volatile Memory Materials: Trendsin High K DRAM Capacitor Technologies Electrode/Dielectric Chemical InteractionsThermal Stability of Structures Non-Volatile and Novel Memory Applications.