Collaborative Research:Design, Modeling, Automation and Experimentation of Nanoscale Computing Fabric using Carbon Nanotubes

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Device scaling of silicon transistors has been the fundamental basis for the phenomenal success of the semiconductor industry.Such scaling is reaching a point where it is absolutely necessary to explore new devices as replacement for traditional silicon transistors.Otherwise, the progress of the semiconductor industry will be severely affected. Carbon Nanotube Field-Effect Transistors (CNFETs) are promising candidates as extensions to traditional Silicon transistors due to excellent device performance. While there have been significant accomplishments in scientific discovery of CNFETs in recent years at the single-device level, a major gap exists between such single-device-level results and the research required to harness the science into practical design technologies at the end of device scaling of silicon transistors. This research project targets to close this gap by developing necessary technologies required to make CNFETs practical candidates for replacing silicon transistors.The objective of this research is to design of robust nanoscale computing fabrics using Carbon Nanotube Field Effect Transistors (CNFETs) in the presence of inherent limitations and imperfections, and to experimentally demonstrate essential components of a fabric such as a processor. This research is motivated by the fact that CNFETs are promising candidates as extensions to Silicon CMOS, yet fundamental nanoscale challenges prevent successful implementations of efficient CNFET-based circuits and systems. This project includes an interdisciplinary research team to demonstrate robust CNFET-based computing fabrics, and also to educate future generations of engineers and the general public in the emerging field of nanoscale computing.