Cross-Layer Resilience Exploration

电子系统是日常生活中不可或缺的一部分。这些系统中的故障会造成各种后果，从恼人的计算机崩溃、数据和服务丢失，到经济和生产力损失，甚至是生命损失。对于使用先进硅技术制造的下一代电子系统，过去基本上是良性的几种硬件故障机制在系统级变得可见。因此，绝大多数未来的电子系统，包括手持设备和服务器，都需要在运行过程中对硬件故障具有弹性。传统的冗余技术带来了巨大的成本，并且对于一般用途来说显然是不切实际的。该提案解决了这一突出的挑战：如何创建系统的方法，以最低的功耗，性能和面积成本实现所需的弹性水平？除了教育新一代的学生和半导体行业的专业人士对新兴的弹性主题，该项目将使更广泛的研究界回答几个关键问题，其中令人满意的答案不存在今天。这些问题的定量答案将使该行业能够创造具有高度成本效益的弹性的下一代电子系统。作为一个附带的好处，从这个项目中获得的结果可以帮助克服与未来复杂电子系统的后硅验证和调试相关的挑战。

Electronic systems are an indispensable part of everyday life. Malfunctions in these systems have consequences ranging from annoying computer crashes, loss of data and services, to financial and productivity losses, or even loss of human life. For coming generations of electronic systems manufactured using advanced silicon technologies, several hardware failure mechanisms, largely benign in the past, are becoming visible at the system-level. As a result, a vast majority of future electronic systems, handhelds and servers alike, will require resilience to hardware failures during their operation. Traditional redundancy techniques impose significant costs, and are clearly impractical for general usage. This proposal addresses this outstanding challenge: how to create systematic approaches to achieve the required level of resilience at minimal power, performance and area costs?In addition to educating new generations of students and semiconductor industry professionals on the emerging resilience topics, this project will enable the broader research community to answer several key questions for which satisfactory answers don't exist today. Quantitative answers to these questions will enable the industry to create next generations of electronic systems with highly cost-effective resilience. As a side benefit, the results obtained from this project can help overcome challenges associated with post-silicon validation and debug of complex electronic systems of the future.