CPA-DA: Efficient Sequential Synthesis and Optimization for High-Performance Circuits

CPA-DA：高性能电路的高效顺序综合和优化

• 批准号: 0811270
• 负责人: Hai Zhou
• 金额: $ 30万
• 依托单位: Northwestern University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-09-01 至 2013-01-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0811270&HistoricalAwards=false
• 关键词: CPA; DA; Efficient; Sequential; Synthesis

PI: Zhou, HaiProposal No: 0811270Title: CPA-DA: Efficient Sequential Synthesis and Optimization for High-Performance CircuitsInstitution: Northwestern UniversityABSTRACTProcessing speed and power consumption have become the most important design criteria in modern high-performance VLSI circuits. They are not only dependent on the combinational part but also on the memory elements (latches and flip-flops) and the clocking mechanism. In the project, we develop an efficient sequential synthesis and optimization framework based on incremental retiming and other network flow techniques. The framework is based on structural operations such as retiming, re-synthesis, and sweep, which are shown to cover almost all possible sequential transformations. A sequential optimization suite based on efficient algorithms for incremental retiming, constrained clock skew scheduling, and sequential floor-planning is developed and will be made available to the public.The outcomes of combined research and education activities improve the performance and design productivity of nanometer VLSI circuits of all types, from high-speed microprocessors to the omnipresent systems-on-a-chips (SOCs) found in PDAs, cell phones, and more. The improvement on performance and design productivity translates to lower cost and better functionality to customers, thus giving all consumers, particularly socio-economically disadvantaged, access to affordable information technology. Furthermore, the high performance computers, enhanced by optimized performance and improved design productivity, will aid research in other important scientific areas such as genetics, bioinformatics, and medicine.

PI：周，海提案编号：0811270题目：CPA-DA：高效顺序综合和优化高性能电路机构：西北大学摘要处理速度和功耗已成为现代高性能VLSI电路最重要的设计指标。它们不仅取决于组合部分，而且还取决于存储元件(锁存器和触发器)和时钟机制。在该项目中，我们开发了一个基于增量重定时和其他网络流技术的高效序列综合和优化框架。该框架基于结构操作，如重定时、重合成和扫描，这些操作被证明涵盖了几乎所有可能的顺序变换。开发了一套基于增量重定时、受限时钟偏差调度和顺序布局规划的高效算法的顺序优化套件，并将向公众开放。研究和教育活动相结合的结果提高了从高速微处理器到PDA、手机等无处不在的片上系统(SOC)等各种类型纳米VLSI电路的性能和设计生产率。性能和设计生产率的提高为客户带来了更低的成本和更好的功能，从而使所有消费者，特别是社会经济上处于不利地位的消费者，都能获得负担得起的信息技术。此外，通过优化性能和提高设计生产率来增强高性能计算机，将有助于其他重要科学领域的研究，如遗传学、生物信息学和医学。