Plesiochronous Communication for Silicon-Constrained High-Speed Serial Links

该奖项是根据2009年美国复苏和再投资法案（公法111-5）资助的。本研究的目的是演示使用时域信号调制高速串行链路的节能，混合信号硅收发器电路。该方法采用准同步双边脉宽调制，在给定的互连上实现比传统脉宽调制更高的数据速率。本文将发明并制作一个90纳米硅混合信号收发电路，以验证信道和源编码方法。智力优势：本研究探讨了高规模硅集成电路工艺所施加的互连带宽和峰值功率约束下的最佳信号。通过结合CMOS电路设计和通信理论的进步来解决深亚微米CMOS的物理限制和传输通道的不利影响，将实现性能改进。更广泛的影响：该项目解决了服务器和计算机通信的节能问题。据估计，全世界需要超过1千兆瓦的电力来为微处理器和存储器之间交换数据的高速串行链路供电，并为工作、娱乐和社交互动提供网络和计算的好处。这项研究的成果推动了全球技术关注，同时教育努力将教授和训练学生关于能源和技术的相互作用，以及电路设计如何解决低功耗计算和通信的需求。该项目将培养一名博士生，并通过积极的指导，向初高中学生开展推广活动。

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).The objective of this research is to demonstrate energy efficient, mixed-signal silicon transceiver circuitry using time-domain signal modulation for high-speed serial links. The approach is to employ plesiochronous double-edge pulse-width modulation to achieve higher data rates than traditional pulse amplitude modulation over a given interconnect. A 90-nanometer silicon mixed-signal transceiver circuit will be invented and fabricated to verify the channel and source coding approach.Intellectual Merit: This research investigates optimal signaling subject to interconnect bandwidth and peak power constraints imposed by highly scaled silicon integrated circuit processes. Performance improvements will be achieved by combining both advances in CMOS circuit design and communication theory to address the physical constraints of deep submicron CMOS and the adverse effects of the transmission channel. Broader Impacts: This project addresses energy savings in server and computer communication. It is estimated that more than one gigaWatt of power is required worldwide to power the high-speed serial links that exchange data between microprocessors and memory and enable the benefits of networking and computing for work, entertainment, and social interaction. The outcomes of this research advance a global technology concern, and coincident educational efforts will teach and train students about the interaction of energy and technology and how circuit design addresses the need for low power computation and communication. The project will train a Ph.D. student and includes outreach activities to middle and high school students through active mentorship.