SHF: Small: Energy-Efficient and Reliable Communication with Silicon Photonics for Terascale Datacenters-on-Chip

电子处理芯片是数字智能的核心，数字智能一直是医疗、消费、工业、网络、航空航天、汽车和国防应用领域突破性技术进步的驱动力。近年来，海量数据生成和消费的应用领域呈现出日益增长的趋势，这给芯片级网络带来了巨大压力，芯片级网络现在必须在比以往更短的时间内传输大量数据。芯片级的传统电气网络在这种压力下正在崩溃，这是灾难性的，因为它阻碍了能够改变社会和改善生活的下一代高性能数字智能的发展。幸运的是，硅光子学已成为一种令人兴奋的技术灵丹妙药，可以用更快的光速传输取代缓慢的电气链路。虽然今天通过长光纤（例如几英里）进行通信相当普遍，但硅光子技术与电子芯片的纳米集成是一种新范例，并提出了尚未解决的巨大挑战。该项目将涉及变革性研究，以克服这些基本挑战，并为实现未来基于光子学的电子芯片铺平道路，这些芯片尺寸微型，但具有与当今大型数据中心计算设施相同的计算能力。与 HP Enterprise 和 Lumerical 的行业合作伙伴的密切合作将有助于成果的快速采用。此外，通过让 K-12、本科生和研究生接触新兴技术、设备、电路、架构和算法的各个方面，该项目将有助于培养灵活的高科技劳动力，从而保持美国在技术创新方面的持续领先地位。该项目的主要贡献将是一个新框架，该框架将突破在芯片级硅光子实现超低能耗和高可靠性数据传输的界限。该框架由密切相关的三个主要推动力组成，将以高度集成的方式解决：（1）表征硅光子器件的行为并探索基于Applied NanoTools Inc.的器件制造的新器件配置，以实现节能和低成本器件的选择； （2）利用硅光子器件设计新电路，克服噪声、增加带宽、降低通信过程中的功耗； (3) 创建新的基于硅光子的网络架构及其优化工具，以实现超低能耗和容错解决方案，用于在芯片级处理核心之间传输数据。除了这三个主旨之外，该框架还将利用跨设备、电路和架构层的跨层洞察，并设计跨越其中两个或多个层的优化。各个层的创新以及跨层的优化将实现比当今更积极的节能和更高可靠性的芯片级通信。这一成果将开创超高性能计算的新时代，电子芯片内的光速数据传输可以与芯片外部基于光学的数据传输协同工作，以克服各个级别的通信能量和性能瓶颈。这样的发展将实现更低成本的超级计算和云数据中心，使计算对科学家来说更便宜，并在日常生活中更加普遍，以无数的方式改变我们的生活。该奖项反映了 NSF 的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。

Electronic processing chips are at the heart of the digital intelligence that has been the driving force for groundbreaking technological advances across the medical, consumer, industrial, networking, aerospace, automotive, and defense application domains. In recent years, there has been a growing trend in these application domains of massive data generation and consumption, which puts immense pressure on the networks at the chip-scale that must now transfer very high volumes of data in much shorter durations of time than ever before. Traditional electrical networks at the chip-scale are breaking down under this pressure, which is catastrophic as it prevents the development of the next generation of high-performance digital intelligence that can transform society and improve lives. Fortunately, silicon photonics has emerged as an exciting technological panacea that can replace slow electrical links with much faster light-speed transfers. While communication over long optical fibers (e.g., several miles) is quite common today, the nano-integration of silicon photonics technology with electronic chips is a new paradigm and presents enormous challenges that have yet to be addressed. This project will involve transformative research to overcome these fundamental challenges, and pave the way for realizing future photonics-based electronic chips that are miniature in size, but with the same computing power as a large datacenter computing facility today. Close collaborations with industrial partners at HP Enterprise and Lumerical will aid in the rapid adoption of the outcomes. Moreover, by exposing K-12, undergraduate, and graduate students to the diverse aspects of emerging technologies, devices, circuits, architectures, and algorithms, the project will contribute to an agile high-tech workforce that will maintain continued US leadership in technological innovation.The principal contribution of this project will be a new framework that will push the boundaries of achieving ultra-low energy and high reliability data transfers with silicon photonics at the chip-scale. This framework consists of three major thrusts that are closely related and will be addressed in a highly integrated manner: (1) Characterize behavior of silicon photonics devices and explore new device configurations based on device fabrication at Applied NanoTools Inc., to enable the selection of energy-efficient and low-cost devices; (2) Design new circuits with silicon photonics devices to overcome noise, increase bandwidth, and reduce power dissipation during communication; and (3) Create new silicon photonics-based network architectures and tools for their optimization, to realize ultra-low energy and fault-resilience solutions for transferring data between processing cores at the chip-scale. Beyond these three thrusts, the framework will exploit cross-layer insights across the device, circuit, and architecture layers, and devise optimizations that span across two or more of these layers. The innovations at the individual layers together with optimizations across layers will achieve more aggressive energy savings and higher reliability chip-scale communication than what is possible today. This outcome will usher in a new era of ultra-high performance computing where light speed data transfers within electronic chips can work together with optics-based data transfers external to the chip, to overcome communication energy and performance bottlenecks at all levels. Such a development will enable lower-cost supercomputing and cloud datacenters, making computing more affordable for scientists and more ubiquitous in everyday life, to transform our lives in innumerable ways.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.