Nanophotonic Interconnect CAD: Automated Design for Nanophotonic Enabled Interconnect in Multicore Architectures

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This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).The objective of this research is to develop an automated design environment for enabling the integration of emerging nanoscale silicon photonic optical interconnect device technologies in next-generation multicore computing architectures. The approach includes a comprehensive simulation framework capable of capturing low-level physical details of both optical and electronic components including, layout footprint, optical losses, and the energy consumption, while maintaining a cycle-accurate functional network simulation. Intellectual Merit: The photonic technologies used to create interconnection networks are fundamentally different from electronic counterparts in how they are designed and perform to achieve interconnect and routing functionalities. Therefore, to exploit the potential advantages of photonic interconnection networks in multicore architectures, a novel design methodology and toolset is developed from scratch in a manner that incorporates the physically different behavior of photonics and provides accurate performance modeling for future multicore systems. Unique to this effort, the physical layer parameters are derived from the design, fabrication, and characterization of real passive and active silicon nanophotonic building blocks devices.Broader Impact: The program advances multiple cross-disciplinary areas in networking, multicore computing architecture, interconnect capabilities and nanoscale silicon photonics. Included in the program are diversity outreach and educational training efforts that emphasize the cross-disciplinary nature of the field. The proposed suite of CAD tools will be made publicly available in an effort to improve the speed and realized complexity of nanophotonic enabled interconnection network development that are able to transform an abstract design concept into a physically-accurate, verified, complex photonic on-chip networks for multicore chip multiprocessors.