On-chip magnetics for power management and delivery in multicore processors

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The objective of this research is to develop a new class of on-chip power electronics circuits that will enable highly granular, active power management for future multicore processors, allowing energy-delay trade-offs to be performed in the presence of workload variability. The approach is based on the introduction of magnetic materials as a "post-process" on a standard CMOS run. Intellectual Merit. Current implementations employ off-chip, board-level voltage regulation and bring in independent supply voltages from off-chip. Such approaches are not scalable and require that power be delivered to the chip at highly scaled voltage levels, leading to unsustainable current demands. We specifically address how passive magnetic devices can dramatically improve the design of on-chip power management and delivery circuits by providing for high density energy storage on-chip. We will innovate new magnetic devices (inductors and GMR sensors) that can be implemented on a conventional CMOS process. Broader Impacts. This project will allow the PIs to train graduate and undergraduate students in a truly cross-disciplinary research environment combining physics, nanoscale materials, circuit design, and power electronics applications. This research effort will also feed a new course at Columbia on power electronics, with a special emphasis on integrated approaches, bridging the disconnect between the power electronics community and the traditional integrated circuit design community. Significant effort will be made for K-12 outreach by systematically training highly motivated high school students within the program and also enhancing the interaction with the local K-12 educators.