Thermal-Aware GPU-Based Design Engine for On-Chip Power Delivery in Power-Efficient Multi-Core Chips

该奖项是根据2009年美国复苏和再投资法案（公法111-5）资助的。本研究的目的是通过利用单指令多数据（SIMD）图形处理单元（gpu）的最新进展来解决多核电源分配设计中的计算挑战。该方法是开发一个大规模并行gpu加速设计引擎，以促进电源门控多核片上电力传输网络的分析，设计和验证，包括电气和热完整性问题。智力优势：积极的细粒度功率门控对于推动当前和未来多核芯片设计的性能与功率范围至关重要。这一需求为复杂电源门控场景下电力输送网络的设计和验证带来了重大挑战。虽然最近GPU的进步提供了一个潜在的有前途的计算解决方案，但有效地使用这种SIMD计算能力需要重新思考计算辅助设计。在这项工作中，将开发特定于gpu的计算范例、算法和实现，以通过低成本SIMD图形处理器上的高效并行计算来解决多核功率分配设计和相关的全芯片热挑战。更广泛的影响：这项工作利用了最近基于SIMD GPU的大规模并行平台来解决CAD挑战。获得的经验可能有助于其他科学和工程领域的计算进步。PI将促进本科生和未被充分代表群体的学生参与研究。这项工作的成果将被整合到PI的研究生级VLSI课程中，为学生提供教育和研究经验。开发的算法和方法将在研究界和主要的半导体和EDA公司广泛传播，以供潜在的工业应用。

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).The objective of this research is to address the computational challenges in multi-core power distribution design by leveraging recent advances in single-instruction multiple-data (SIMD) graphics processing units (GPUs). The approach is to develop a massively parallel GPU-accelerated design engine to facilitate the analysis, design and verification of power-gated multi-core on-chip power delivery networks encompassing both electrical and thermal integrity issues. Intellectual Merit: Aggressive fine-grained power gating is essential to pushing the performance vs. power envelope of current and future multi-core chip designs. This need introduces significant challenges in the design and verification of power delivery networks under complex power gating scenarios. While the recent GPU advances provide a potentially promising computing solution, the effective use of such SIMD compute power requires rethinking computed-aided design. In this work, GPU-specific computing paradigms, algorithms and implementations will be developed to address multi-core power distribution design and associated full-chip thermal challenges via efficient parallel computing on low-cost SIMD graphics processors. Broader Impacts: This work exploits recent SIMD GPU based massively parallel platforms for addressing CAD challenges. The acquired experience is likely to contribute to computing advances in other science and engineering fields. The PI will promote the research participation from undergraduate students and students from underrepresented groups. The outcomes of this work will be integrated into the PI's graduate-level VLSI courses to provide educational and research experiences to students. The developed algorithms and methodologies will be disseminated in the research community at large and major semiconductor and EDA companies for potential industrial application.