CSR: Small: Codesign of Accelerator Interface Software and Hardware

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Frequent doubling of computer system performance has facilitated innovations in science, education, government, and commerce. The foundations of these improvements, Moore's Law improving density and Dennard scaling reducing transistor power, have enabled chips with exponentially more transistors at roughly fixed power and cost. However, upcoming physical limits threaten to force a choice between either chip power and cost escalation or stagnant chip performance where lowest cost wins.This project seeks a new middle approach, called dark silicon, that keeps the number of powered-on transistors roughly constant even as the number of transistors per chip grows. Rather than add general-purpose cores, future mainstream chips will deploy many accelerators to improve performance or power by 10x-100x. Such chips will turn on one or more accelerators when needed to help power and/or performance and leave most others off. Accelerators for system-on-chip (SoC) have already been designed, for such uses as encryption, (de)compression, network protocols, XML, and graphics. This research seeks to invent and refine architecture and system support to make existing and future accelerators possible in mainstream processors. Specific focus is given to low-overhead solutions facilitating fine-grain use that allow accelerators to be used and shared while protecting security and privacy. The project relies on co-design of hardware and software interfaces to accelerators in order to enable direct, low-latency access from user-mode code via coherent shared-memory communication.More efficient access to accelerators enables Moore's law to bring continued performance increases without corresponding increases in power. This can reduce the overall power consumption of computing and reduce greenhouse gas production, as well as provide greater computation power at any scale, whether in a mobile device or a supercomputer. The PIs continue to impact broadly the state-of-the-art of computer systems through students, courses, talks, industrial affiliates, commercial influence, and sharing of infrastructure.