SHF: Medium: Title: Idempotent Processing and Architectures

几十年来，摩尔定律允许计算能力呈指数级增长，同时降低数字设备的功耗。由于基本的材料特性和工程挑战，作为数字设备的构建块的晶体管的功率和能效在未来不会有显著提高。因此，为了在不增加功耗的情况下继续提供性能改进，需要设计微处理器的新技术。这项研究项目着眼于一种新的方法来制造微处理器，以使它们更节能。这项研究项目的主要思想是开发技术，使微处理器能够有效地预测，而不必花费耗电的资源来恢复，以防预测出错。这项研究以一种新颖的方式利用了幂等数学原理(多次做某事产生相同的结果)。在本项目中，将这一原理应用到微处理器设计中，开发了一类称为幂等处理器的处理器。这项研究涉及对该技术的正式理论分析、构建软件编译器的方法，以及从CPU到GPU的微处理器设计，以利用这一原理。这个项目的核心思想是利用幂等的性质：多次执行幂等运算会产生相同的结果。这项研究基于以下见解：应用程序自然分解为一系列连续的幂等区域；即，它们的执行可以分解为一组区域，其中每个区域都是幂等区域-重新执行没有副作用。这项研究发展了幂等处理器的概念，其基本抽象是执行代码的幂等区域。这允许对微处理器流水线进行新颖的修改，并允许多种形式的推测，而无需在重新执行之前恢复任何状态。这种设计方法将对性能、可靠性和能效执行的推测统一在一个原则方法下。静态分析研究形式化了幂等元的概念，并研究了确定幂等元区域的机制。针对各种ISA(指令集体系结构)、CPU(中央处理单元)和GPU(文法处理单元)的编译器实现对该方法进行了定量评估。该项目跨越多个协同方向的端到端解决方案具有潜在的颠覆性影响。该项目涉及威斯康星大学麦迪逊分校和德克萨斯大学圣安东尼奥分校之间的合作，涉及本科生研究人员，机构之间的交流，并探索在威斯康星大学和加州大学圣安东尼奥分校的综合课程改进和拓展。该项目的多学科和多机构合作提供了分散的影响。

For many decades, Moore's Law has allowed exponential growth in computing capability while simultaneously reducing the power consumed by digital devices. Due to fundamental material properties and engineering challenges, in the future the power and energy efficiency of transistors that are the building blocks of digital devices will not improve significantly. Thus to continue providing performance improvements without increasing power consumption, new techniques to design microprocessors are required. This research project looks at a new approach to build microprocessors to make them more energy efficient. The main idea in this research project is to develop techniques allowing microprocessors to efficiently predict without having to expend power-hungry resources to recover in case the prediction is wrong. The research leverages the mathematical principle of idempotence (doing something multiple times producing the same result) in a novel way. In this project, this principle is applied to microprocessor design to develop a class of processors called Idempotent Processors. The research addresses formal theoretical analysis of the technique, ways to build software compilers, and microprocessor designs spanning CPUs to GPUs to exploit this principle. The core idea of this project is to use the property of idempotence: performing an idempotent operation many times produces the same result. The research builds upon the following insight: applications naturally decompose into a continuous series of idempotent regions; i.e., their execution can be broken down into a set of regions, where each region is idempotent - re-execution has no side-effects. The research develops the idea of Idempotent Processors, whose fundamental abstraction is executing idempotent regions of code. This allows novel modifications to the microprocessor pipeline and allows many forms of speculation without the need to restore any state prior to re-execution. This design approach unifies speculation for performance, reliability, and energy efficient execution under one principled approach. The static analysis research formalizes the notion of idempotence and investigates mechanisms for determining idempotent regions. The compiler implementation for various ISAs (instruction set architectures), CPUs (central processing units), and GPUs (grahics processing units) evaluates the approach quantitatively. The project's end-to-end solutions across multiple synergistic directions have potential for disruptive impact. The project involves collaborative work between UW-Madison and UT-San Antonio and involves under-graduate researchers, exchanges visits between institutions, and explores integrated curriculum enhancement and outreach across UW and UTSA. The project's multi-disciplinary and multi-institution collaboration provides distributed impact.