PFI:AIR - TT: Memory Processing Unit: A Low Power Processor for Analytics Applications

PFI:AIR - TT：内存处理单元：用于分析应用的低功耗处理器

• 批准号: 1701099
• 负责人: Karthikeyan Sankaralingam
• 金额: $ 20万
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-06-01 至 2019-11-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1701099&HistoricalAwards=false
• 关键词: PFI; AIR; TT; Memory; Processing

This PFI: AIR Technology Translation project focuses on translating 3D chip-stacking technology to develop a new microprocessor architecture called Memory Processing Unit (MPU). The new architecture offers the promise of faster, more energy efficient calculations than current solutions. This is important because there is a large body of applications such as deep-learning, big-data analytics, and data science that all require significant processing capability. While capability requirements continue to increase to meet the needs of these new applications, the rate of improvement of power efficiency of the microprocessors is decreasing (in other words, the trends predicted by Moore's Law are beginning to slow). This project will result in a prototype chip-design of the MPU with complete software API (Application Programming Interface) for end-to-end application demonstrations based on real-time speech recognition and big-data analytics for Internet search capabilities. The MPU includes the following unique features: an energy-efficient simple core implementation (including exploration of mechanisms for pipeline organization, virtual-memory, and coherence), an implementation that connects 128 such cores together, cores connected through 3D links to memory, and end-to-end software implementation. Compared to state-of-art server chips in the market, the MPU architecture provides two-fold to 12-fold calculation speedup while reducing energy consumption by 10-fold. This project addresses the following two technology gaps as it translates from research discovery toward commercial application: a) the difficulty of developing end-to end software on this new highly concurrent architecture and the determination of the mechanisms required, and b) Extensive exploration of various application domains (initially demonstrating speech recognition and internet search capabilities) to determine quantitatively the benefits of this architecture over the state-of-the-art. Personnel involved in this project, including graduate students and undergraduates, will receive innovation and entrepreneurship experiences through the technology commercialization activities, customer interviews, and business development. In addition the team will work with entrepreneurship programs like D2P at UW-Madison.

该PFI：AIR技术转换项目的重点是将3D芯片堆叠技术转换为一种新的微处理器架构，称为内存处理单元（MPU）。新架构提供了比当前解决方案更快、更节能的计算承诺。这很重要，因为深度学习、大数据分析和数据科学等大量应用都需要强大的处理能力。当能力要求继续增加以满足这些新应用的需要时，微处理器的功率效率的改进速率正在降低（换句话说，由摩尔定律预测的趋势开始变慢）。 该项目将产生MPU的原型芯片设计，并提供完整的软件API（应用程序编程接口），用于基于实时语音识别和互联网搜索功能的大数据分析的端到端应用演示。MPU包括以下独特的功能：节能的简单核心实现（包括探索流水线组织，虚拟内存和一致性的机制），将128个这样的核心连接在一起的实现，通过3D链接连接到内存的核心，以及端到端的软件实现。与市场上最先进的服务器芯片相比，MPU架构提供了2倍至12倍的计算加速，同时将能耗降低了10倍。 该项目在从研究发现转向商业应用的过程中解决了以下两个技术差距：a）在这种新的高度并发的体系结构上开发端到端软件的困难以及所需机制的确定，和B）广泛探索各种应用领域（最初演示语音识别和互联网搜索功能），以定量地确定这种架构的优势，art.参与本项目的人员，包括研究生和本科生，将通过技术商业化活动、客户访谈和业务发展获得创新和创业经验。此外，该团队将与创业计划，如D2P在威斯康星大学麦迪逊分校。