CAREER: A Vertically Integrated Approach to Microprocessor Design for Unpredictable Silicon

职业生涯:针对不可预测硅的微处理器设计的垂直集成方法

基本信息

  • 批准号:
    0845751
  • 负责人:
  • 金额:
    $ 44.99万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Standard Grant
  • 财政年份:
    2009
  • 资助国家:
    美国
  • 起止时间:
    2009-07-01 至 2014-06-30
  • 项目状态:
    已结题

项目摘要

The basic hardware technology that is used to build microprocessors and the applications we run on them are are radically changing. Hardware building blocks are becoming increasingly brittle and error-prone, leading to a fundamentally unpredictable hardware substrate. Applications are also changing, and emerging new classes of applications are increasingly relying on probabilistic methods. They have an inherent tolerance for uncertainty, do not require hardware to be correct all the time, and this provides an opportunity to creatively utilize hardware.This CAREER proposal develops a vertically integrated approach that exposesthese hardware properties to the applications to develop more efficient system-wide solutions. This simplifies the physical manufacturing and design of microprocessors, and can make them more efficient. The PI unifies analyses in different parts of the microelectronics system stack to develop new interfaces between layers and techniques to expose more information across these layers. In the integrated education plan, the PI seeks to broaden the computerarchitecture curriculum by educating students on the implications of these physical silicon technology drivers on microprocessor designs. The research component of this proposal has broad implications across all microelectronic systems since it is becoming harder to manufacture smaller and smaller devices. The innovations proposed can enable continued technology scaling and have the potential to reduce complexity and cost in the overall micro-electronics system stack, and help maintain the US lead in microelectronics.This award is funded under the American Recovery and Reinvestment Act of 2009(Public Law 111-5).
用于构建微处理器的基本硬件技术和我们在其上运行的应用程序正在发生根本性的变化。硬件构建块变得越来越脆弱和容易出错,导致从根本上无法预测的硬件基板。应用程序也在不断变化,新兴的新应用程序类别越来越依赖概率方法。他们对不确定性有着与生俱来的容忍度,不需要硬件始终保持正确,这就提供了创造性地利用硬件的机会。这份职业建议书开发了一种垂直集成的方法,将这些硬件属性暴露给应用程序,以开发更高效的系统范围解决方案。这简化了微处理器的物理制造和设计,并可以提高它们的效率。PI统一了微电子系统堆栈不同部分的分析,以开发层之间的新接口和技术,以暴露这些层之间的更多信息。在综合教育计划中,PI寻求通过教育学生了解这些物理硅技术驱动因素对微处理器设计的影响来拓宽计算机体系结构课程。这项提案的研究部分对所有微电子系统都有广泛的影响,因为制造越来越小的设备变得越来越困难。建议的创新可以实现持续的技术扩展,并有可能降低整个微电子系统堆栈的复杂性和成本,并有助于保持美国在微电子领域的领先地位。该奖项由2009年美国复苏和再投资法案(公共法律111-5)资助。

项目成果

期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)

数据更新时间:{{ journalArticles.updateTime }}

{{ item.title }}
{{ item.translation_title }}
  • DOI:
    {{ item.doi }}
  • 发表时间:
    {{ item.publish_year }}
  • 期刊:
  • 影响因子:
    {{ item.factor }}
  • 作者:
    {{ item.authors }}
  • 通讯作者:
    {{ item.author }}

数据更新时间:{{ journalArticles.updateTime }}

{{ item.title }}
  • 作者:
    {{ item.author }}

数据更新时间:{{ monograph.updateTime }}

{{ item.title }}
  • 作者:
    {{ item.author }}

数据更新时间:{{ sciAawards.updateTime }}

{{ item.title }}
  • 作者:
    {{ item.author }}

数据更新时间:{{ conferencePapers.updateTime }}

{{ item.title }}
  • 作者:
    {{ item.author }}

数据更新时间:{{ patent.updateTime }}

Karthikeyan Sankaralingam其他文献

Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign
用于可编程加速器协同设计的混合优化/启发式指令调度
OpenSPLySER: The Integrated OpenSPARC and DySER Design
OpenSPLySER:集成的 OpenSPARC 和 DySER 设计
  • DOI:
  • 发表时间:
    2011
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Jesse Benson;Ryan Cofell;Chris Frericks;C. Ho;Karthikeyan Sankaralingam
  • 通讯作者:
    Karthikeyan Sankaralingam
Idempotent code generation: Implementation, analysis, and evaluation
幂等代码生成:实现、分析和评估
Research Statement for Karthikeyan Sankaralingam Dissertation Summary
Karthikeyan Sankaralingam 论文摘要的研究陈述
  • DOI:
  • 发表时间:
    2006
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Karthikeyan Sankaralingam
  • 通讯作者:
    Karthikeyan Sankaralingam
Multicore Model from Abstract Single Core Inputs
来自抽象单核输入的多核模型
  • DOI:
    10.1109/l-ca.2012.27
  • 发表时间:
    2013
  • 期刊:
  • 影响因子:
    2.3
  • 作者:
    Emily R. Blem;H. Esmaeilzadeh;Renée St. Amant;Karthikeyan Sankaralingam;D. Burger
  • 通讯作者:
    D. Burger

Karthikeyan Sankaralingam的其他文献

{{ item.title }}
{{ item.translation_title }}
  • DOI:
    {{ item.doi }}
  • 发表时间:
    {{ item.publish_year }}
  • 期刊:
  • 影响因子:
    {{ item.factor }}
  • 作者:
    {{ item.authors }}
  • 通讯作者:
    {{ item.author }}

{{ truncateString('Karthikeyan Sankaralingam', 18)}}的其他基金

FoMR: Collaborative Research: Single-Thread Multi-Accelerator Execution to Close the Dennard Scaling Gap
FoMR:协作研究:单线程多加速器执行以缩小 Dennard 缩放差距
  • 批准号:
    1823447
  • 财政年份:
    2018
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
PFI:AIR - TT: Memory Processing Unit: A Low Power Processor for Analytics Applications
PFI:AIR - TT:内存处理单元:用于分析应用的低功耗处理器
  • 批准号:
    1701099
  • 财政年份:
    2017
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
SHF:SMALL:Pushing the Limits of Transparent Specialization
SHF:SMALL:突破透明专业化的极限
  • 批准号:
    1618234
  • 财政年份:
    2016
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
CSR: Small: Accelerating Towards the Hardware Specialization Era: A Holistic Approach
CSR:小:加速迈向硬件专业化时代:整体方法
  • 批准号:
    1218432
  • 财政年份:
    2012
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
SHF: Medium: Title: Idempotent Processing and Architectures
SHF:媒介:标题:幂等处理和架构
  • 批准号:
    1162215
  • 财政年份:
    2012
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
CSR: SMALL: Formal Models, Processor Architecture, and Evaluation of Sampling for Hardware Reliability
CSR:SMALL:形式模型、处理器架构和硬件可靠性采样评估
  • 批准号:
    1117782
  • 财政年份:
    2011
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
SHF: Small: Multi-Core Architecture, Applications, and Tools Co-Design
SHF:小型:多核架构、应用程序和工具协同设计
  • 批准号:
    0917238
  • 财政年份:
    2009
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
NeTS:Small:A Unified Lookup Framework to Enable the Rapid Deployment of New Protocols in High-Speed Routers
NeTS:Small:统一查找框架,支持在高速路由器中快速部署新协议
  • 批准号:
    0917213
  • 财政年份:
    2009
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant

相似海外基金

RTG: Vertically Integrated Interdisciplinary Training in Mathematics for Human Health
RTG:人类健康数学垂直整合跨学科培训
  • 批准号:
    2230790
  • 财政年份:
    2023
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Continuing Grant
A platform of vertically integrated tools for the creative industries to empower independent creators as entrepreneurs to own their businesses and intellectual property
创意产业垂直整合工具平台,使独立创作者作为企业家能够拥有自己的业务和知识产权
  • 批准号:
    10023969
  • 财政年份:
    2022
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Collaborative R&D
Vertically Integrated Cloud Based Ports
垂直集成的基于云的端口
  • 批准号:
    10007967
  • 财政年份:
    2021
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Collaborative R&D
2020 Vertically Integrated Projects (VIP) Consortium Meeting: Planning and Fostering Dissemination of the VIP Model
2020年垂直一体化项目(VIP)联盟会议:规划和促进VIP模式的传播
  • 批准号:
    2013545
  • 财政年份:
    2020
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
Non-price Policy Designs by Vertically Integrated Platforms
垂直整合平台的非价格政策设计
  • 批准号:
    20K22117
  • 财政年份:
    2020
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Grant-in-Aid for Research Activity Start-up
VEHICLE – Vertically-intEgrated Homogeneous LumInance Colour Lighting Enterprise
车辆—垂直一体化均质亮度彩色照明企业
  • 批准号:
    33362
  • 财政年份:
    2019
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Collaborative R&D
SHF: Small: Accelerating Graph Processing with Vertically Integrated Programming Model, Runtime and Architecture
SHF:小型:利用垂直集成编程模型、运行时和架构加速图形处理
  • 批准号:
    1717754
  • 财政年份:
    2017
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
SHF: Small: Vertically Integrated Persistence
SHF:小型:垂直集成持久性
  • 批准号:
    1718335
  • 财政年份:
    2017
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
IRES: Vertically Integrated Team for Structural DNA NanoTech in Denmark
IRES:丹麦结构 DNA 纳米技术垂直整合团队
  • 批准号:
    1559077
  • 财政年份:
    2016
  • 资助金额:
    $ 44.99万
  • 项目类别:
    Standard Grant
{{ showInfoDetail.title }}

作者:{{ showInfoDetail.author }}

知道了