NeTS:Small:A Unified Lookup Framework to Enable the Rapid Deployment of New Protocols in High-Speed Routers
NeTS:Small:A Unified Lookup Framework to Enable the Rapid Deployment of New Protocols in High-Speed Routers
批准号:
0917213
负责人:
Karthikeyan Sankaralingam
金额:
$38.58万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-09-15 至 2013-08-31
中文摘要
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英文摘要
High-end routers and switches perform performance-critical lookupsinto large data based on network packet content. Current designs relyon specialized hardware modules for high performance. While mostlysufficient, emerging new protocols create a problem; for these to bedeployed, expensive equipment upgrades are required. To support the rapid deployment of new data plane protocols, we need a flexible hardware/software framework.This project is developing such a unified framework for futurenetwork devices with four components: a) an abstract execution modelto represent hardware, b) a toolchain to ease implementation, d)quantitative performance evaluation of protocols, and d) programmablehardware architectures specialized for the core operations in networkprotocols. Leveraging trends in tiled architectures, the project isdeveloping a specialized tiled architecture that moves computation closeto storage and thus provide efficient lookups. The project is alsoinvestigating how these design methodologies extend beyond protocolprocessing to payload inspection as required by intrusion prevention,application identification and other functionality.Deploying and implementing new protocols is challenging. This projectwill result in specification of flexible hardware for high-endrouters. This flexibility to support multiple protocols using a singletoolchain and architecture framework will reduce development costs offuture high-end routers and speedup the deployment of newprotocols. Another outcome will be the open-source release tothe academic community of the toolchain for developing high-speedimplementation of protocols, reference implementations of variousprotocols, standard data sets, and a NetFPGA implementation of theproposed hardware architecture.
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