SHF: Small: Shared Memory Architectures and Microarchitectures for Heterogeneous General-Purpose Chips

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The computing industry is currently producing and developing chips that include processor cores of different types. The move towards heterogeneous chips is due to two trends: the ability to squeeze more transistors on each chip and the improved power-efficiency of using specific cores for specific purposes. This research project extends the inter-core communication systems and precise specifications of homogeneous chips to heterogeneous chips. The benefits of extending homogeneous communication paradigms include improved performance and improved power-efficiency, and preliminary results show orders of magnitude improvements in both metrics. Society relies upon computers for ever more purposes, and qualitatively improving their performance and power-efficiency are critical to future computing platforms. Furthermore, by extending homogeneous specification methodologies, this research project facilitates chip testing and validation for heterogeneous chips, which is a significant fraction of industry effort in chip development, and eases the programming of these chips, which is among the biggest challenges in computing today. This research project consists of two technical thrusts. The first thrust is the development of memory systems for heterogeneous chips. Rather than treat a heterogeneous chip as two distinct systems that happen to share a chip, the goal is to closely integrate the heterogeneous cores in a systematic fashion that enables most communication between cores to be performed via on-chip caches rather than via off-chip memory. The second research thrust is to extend the notion of a computer architecture--an implementation-independent specification of a processor's behavior--from homogeneous systems to chip-wide heterogeneous systems. This research project involves the design and experimental evaluation of heterogeneous processor chips, and the bulk of the experimental work uses full-system simulation and experiments on purchased hardware. The contributions of this project will be heterogeneous processor chips that have significantly greater performance and power-efficiency, as well as implementation-independent architectures for heterogeneous chips. Society will be using heterogeneous processor chips in personal computers, in smartphones, and via cloud-provided services. Qualitatively improving these chips will enhance user computing experiences and enable new and exciting computing applications.