Polymer-wrapped Carbon Nanotubes for high performance field effect transistors

本计画的目的是利用半导体奈米碳管的自我组装来制造高效能的场效电晶体。虽然对更大信息存储容量和更高速度信息处理的需求比以往任何时候都要大，但传统硅基材料的可扩展性正在接近其极限，这推动了对新技术的研究。单壁碳纳米管（SWNTs）作为一种具有独特电子特性的坚固纳米尺寸材料，为小型化提供了前所未有的潜力。由于它们的半导体性质和弹道（无散射）传输，它们满足了对具有低成本技术潜力的高性能半导体的需求。尽管碳纳米管器件显示出比实际（Si基）晶体管高1000倍的载流子迁移率，但它们在工业应用中的使用仍然是难以捉摸的。最严重的问题是：i）不能生产大量具有相同物理性质（半导体）的纳米管，ii）难以将单个纳米管放置在表面上的预定位置。该项目将通过利用共轭聚合物包裹的单壁碳纳米管来解决这两个问题，以获得i）富含半导体单壁碳纳米管的样品和ii）通过自组装控制放置。半导体管的识别将通过用特定的共轭聚合物包裹它们来实现。此外，聚合物将被用作锚定系统，以解决在特定的衬底位置的单壁碳纳米管和自组装制造晶体管。

The aim of this project is to fabricate highly performing field effect transistors by self-assembling semiconducting carbon nanotubes. While the demand for larger information storage capacity and higher speed information processing are greater than ever, the down scalability of conventional silicon-based materials are approaching their limits, driving the search for new technologies. Single wall carbon nanotubes (SWNTs) offer unprecedented potential for miniaturization as a robust, nanometer size material with unique electronic properties. Due to their semiconducting properties and ballistic (scattering free) transport, they address the need for highly performing semiconductors which have the potential of a low cost technology. In spite of the fact that carbon nanotube devices shown carrier mobilities of up to 1000 times higher than that of the actual (Si based) transistors, their use in industrial application remains elusive. The most serious problems are: i) the inability to produce large quantities of nanotubes with the same physical properties (semiconducting), ii) the difficulty to place individual nanotubes in predetermined positions on a surface. This project will address both problems by taking advantage of conjugated polymer wrapped SWNTs to obtain i) samples enriched of semiconducting SWNTs and ii) controlled placement through self-assembly. Recognition of semiconducting tubes will be achieved by wrapping them with specific conjugated polymers. Furthermore, the polymers will be used as anchoring system to address the SWNTs on specific substrates positions and fabricate transistors by self-assembly.