CIF: Small: Towards Practical Validation Of Nonlinear Analog and Mixed-Signal Circuits
CIF: Small: Towards Practical Validation Of Nonlinear Analog and Mixed-Signal Circuits
批准号:
1423431
负责人:
Shobha Vasudevan
金额:
$44.86万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2014
资助国家:
美国
项目状态:
已结题
起止时间:
2014-08-01 至 2017-07-31
中文摘要
点击翻译按钮获取中文摘要
英文摘要
Analog components are increasingly prevalent in our mobile, handheld, health monitoring, automotive, GPS and other embedded devices (e.g., in the iphone 5, twenty out of twenty eight components are of analog/mixed signal type). The benefit of using analog devices over purely digital devices is that they offer low power, low cost and high flexibility of parameters in the design space. However, the design flexibility comes with a tradeoff of complexity in the verification/validation of these systems. While verification of the correctness of a digital design is a hard problem, analog systems introduce complexity in behavior that surpasses digital verification. Hence, with the growing use of analog components, ensuring that these systems are correct is critical to their design process. Since analog components were isolated single components in previous generations of devices, there has been a void in the research in this area. This project attempts a methodology to provide a quantum leap over the current practices of analog validation and have the potential to bridge the gap between analog design and design automation tools, paving the way for other analog verification methodologies to evolve further. Course material on analog and mixed signal verification for undergraduate and graduate students at the University of Illinois and elsewhere will be developed as part of the proposal. MyTri, a professional networking portal for women in computing will be further developed by the PI with NSF funds as well. From a technical standpoint, the design of analog and mixed-signal are much more complicated than purely digital design, due to nonlinear behavior, continuous state spaces, as well as traditional methods of manual validation. In the context of system level integration, Monte Carlo simulations methods, the de facto standard for analog circuit validation, fall short of the intended goal of providing an ability to generate input stimulus, control the type of simulations, specify desired constraints or trigger events, as well as provide debugging, diagnosis capacity and a method to evaluate the test coverage. This work proposes a validation environment with all the capabilities listed above. The proposal is to analyze randomized tree based search algorithms. These algorithms can be made controllable to achieve different validation objectives. The problems addressed in the proposed work are computationally very complex, and thus, scalable solutions to these problems is a challenge that will also be addressed.
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CAREER: GoldMine:Automatic Assertion Generation in System Design Using Data Mining and Static Analysis
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批准号:0953767
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项目类别:Continuing Grant
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资助金额:$43.0万
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财政年份:2010
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负责人:Shobha Vasudevan
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依托单位:
国内基金
海外基金
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