IRES: International Research Experience for Students on Design Automation of Three-Dimensional Integrated Circuits

IRES：三维集成电路设计自动化学生国际研究经验

• 批准号: 1456867
• 负责人: Yiyu Shi
• 金额: $ 24.97万
• 依托单位: Missouri University of Science and Technology
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2015
• 资助国家: 美国
• 起止时间: 2015-11-01 至 2015-10-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1456867&HistoricalAwards=false
• 关键词: IRES; International; Research; Experience; Students

Non-Technical Abstract: This project will enable U.S. students to conduct high-quality research on design automation of three dimensional integrated circuits (3D ICs), in collaboration with their faculty mentors at National Tsing Hua University (NTHU) in Taiwan. Such experiences expose U.S. students to the international research community at a critical early stage in their careers. It is expected that through participating in this project, U.S. students will gain extensive experience on the research of 3D ICs, on the international semiconductor prospects, on the culture in Taiwan, and on performing and collaborating in an international environment in general. The experience will also be shared to the broader community through the involvement of personal social media, Web 2.0 based forum, carefully integrated activities such as research for undergraduate students, as well as outreach events for local schools. In particular, this project will have a dedicated focus on the career development of minorities and underrepresented groups.Technical Abstract: This IRES project provides U.S. students with valuable research experience related to the design automation of three-dimensional integrated circuits (3D ICs) in Hsin-Chu, Taiwan, where the world's largest semiconductor industry is located. The project will select five (5) graduate students and two (2) undergraduate students nation-wide each year and support them to visit the Computer Science Department at National Tsing Hua University (NTHU) over a period of twelve (12) weeks. They will be mentored by the professors at NTHU. The primary research objective is to address fundamental issues in 3D ICs and to bridge the gap between advanced 3D fabrication processes and the designers using these technologies. The Moore's Law states that the transistor density on integrated circuits doubles approximately every two years. However, this trend is becoming increasingly difficult to keep due to the high cost associated with semiconductor scaling. Accordingly, the semiconductor industry has started to look for alternative technologies that offer a path beyond the limits of device scaling. Among all the possible alternatives, the three-dimensional integrated circuit (3D IC) is generally considered to be the most promising one, at least in the next decade, for its full compatibility with current technologies. Instead of making transistors smaller, it stacks multiple chips vertically for higher integration density, shorter wirelength, smaller footprint, higher speed, and lower power consumption. As such, 3D IC has become a very hot topic in academic research and industry practice in recent years. The students will work on projects related to the yield enhancement of 3D ICs and the novel design flows for two promising 3D technologies - interposer-based 3D ICs and monolithic 3D ICs. The research can significantly increase the yield of 3D ICs without involving area penalty. It is anticipated that the breakthroughs from this IRES project at NTHU can have a direct impact on the 3D IC industry.

非技术摘要：该项目将使美国学生能够与他们在台湾清华大学(NTHU)的教师导师合作，对三维集成电路(3D IC)的设计自动化进行高质量的研究。这样的经历让美国学生在职业生涯的关键早期阶段接触到了国际研究界。预计通过参与这个项目，美国学生将在3D IC的研究、国际半导体前景、台湾文化以及在国际环境中的表演和合作方面获得丰富的经验。还将通过参与个人社交媒体、基于Web 2.0的论坛、精心整合的活动(如针对本科生的研究)以及针对当地学校的外联活动，将经验分享给更广泛的社区。技术摘要：这个IRES项目为美国学生提供了宝贵的研究经验，与台湾新竹的三维集成电路(3D IC)设计自动化相关。台湾是世界上最大的半导体产业所在地。该项目将每年在全国范围内挑选五(5)名研究生和两(2)名本科生，并支持他们在十二(12)周内访问国立清华大学(NTHU)计算机科学系。他们将由南洋理工大学的教授指导。主要的研究目标是解决3D集成电路的基本问题，并弥合先进的3D制造工艺和使用这些技术的设计者之间的差距。摩尔定律指出，集成电路上的晶体管密度大约每两年翻一番。然而，由于与半导体规模相关的高成本，这一趋势变得越来越难以保持。因此，半导体行业已经开始寻找替代技术，提供一条超越器件规模限制的途径。在所有可能的替代方案中，三维集成电路(3D IC)被普遍认为是最有前途的替代方案，至少在未来十年是这样，因为它与现有技术完全兼容。它不是使晶体管更小，而是垂直堆叠多个芯片，以实现更高的集成密度、更短的有线长度、更小的占地面积、更高的速度和更低的功耗。因此，近年来，3D IC已经成为学术研究和行业实践中的一个非常热门的话题。学生将从事与3D IC成品率提高以及两种有前景的3D技术-基于插入器的3D IC和单片3D IC-的新设计流程相关的项目。该研究可以在不涉及面积损失的情况下显著提高3D IC的成品率。预计南洋理工大学IRES项目的突破将对3D IC产业产生直接影响。