SHF: Small: On-Die Learning: A Pathway to Post-Deployment Robustness and Trustworthiness of Analog/RF ICs

SHF：小型：片上学习：实现模拟/射频 IC 部署后稳健性和可信度的途径

• 批准号: 1527460
• 负责人: Yiorgos Makris
• 金额: $ 35万
• 依托单位: University of Texas at Dallas
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2015
• 资助国家: 美国
• 起止时间: 2015-07-15 至 2019-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1527460&HistoricalAwards=false
• 关键词: SHF; Small; Die; Learning; Pathway

Towards enabling reliable computing and promoting technology trustworthiness, this project seeks to facilitate cost-effective realization of robust and trusted integrated circuits (ICs), with particular emphasis in the analog/RF domain. While manufactured ICs are subjected to extensive scrutiny in order to weed out defective or suspicious parts prior to their deployment, a variety of reasons such as silicon aging and adverse operational or environmental conditions might cause the performances of a previously healthy analog/RF IC to fail its design specifications. Similarly, field-activated triggers of hidden capabilities might cause a previously trusted analog/RF IC to exhibit malicious functionality. With analog/RF ICs now prevalent in most electronic systems, due to the rapid growth of wireless communications, sensor applications, and the Internet of Things (IoT), equipping them with robustness and trustworthiness evaluation mechanisms becomes paramount to the applications wherein they are deployed. The proposed research is complemented by educational and outreach activities, including development of a new educational module, by providing opportunities for graduate and undergraduate research in interdisciplinary projects spanning Electrical Engineering, Computer Science and Applied Mathematics, as well as exposure of local community members to the topics of self-test, self-calibration, and post-deployment trust evaluation of analog/RF ICs through tutorials and seminars organized by the Texas Analog Center of Excellence (TxACE) at the University of Texas at Dallas. More specifically, this project seeks to enhance post-deployment robustness and trustworthiness of analog/RF ICs by integrating machine learning-based on-die monitoring and calibration capabilities. The key focus of this project is the cost-effective integration of on-die learning capabilities, which can be trained to (i) determine whether an analog/RF IC complies with its specifications, (ii) calibrate its performances, and/or (iii) detect the activation of potentially malicious circuitry, based on simple measurements from on-chip sensors. Through design, fabrication and characterization of two different analog/RF ICs, this project seeks to demonstrate that on-die intelligence can be integrated to provide post-deployment self-test, calibration and trust evaluation capabilities.

为了实现可靠的计算和促进技术可信度，该项目旨在促进具有成本效益的鲁棒和可信集成电路（IC）的实现，特别强调模拟/RF领域。虽然所制造的IC在部署之前会受到广泛的审查，以便剔除有缺陷或可疑的部件，但各种原因（如硅老化和不利的操作或环境条件）可能会导致先前健康的模拟/RF IC的性能无法达到其设计规格。类似地，隐藏功能的场激活触发器可能会导致先前受信任的模拟/RF IC表现出恶意功能。由于无线通信、传感器应用和物联网（IoT）的快速增长，模拟/RF IC现在在大多数电子系统中流行，为其配备鲁棒性和可信度评估机制对于部署它们的应用至关重要。拟议的研究是由教育和推广活动，包括开发一个新的教育模块，通过提供机会，研究生和本科生研究跨学科项目跨越电气工程，计算机科学和应用数学，以及曝光的当地社区成员的自我测试，自我校准，以及模拟/RF IC的部署后信任评估，这些评估由位于达拉斯的德克萨斯大学模拟卓越中心（TxACE）组织的教程和研讨会进行。更具体地说，该项目旨在通过集成基于机器学习的管芯监控和校准功能，增强模拟/RF IC的部署后鲁棒性和可信度。该项目的重点是成本效益高的片上学习功能集成，可以通过训练来（i）确定模拟/RF IC是否符合其规格，（ii）校准其性能，和/或（iii）基于片上传感器的简单测量来检测潜在恶意电路的激活。通过设计、制造和表征两种不同的模拟/RF IC，该项目旨在证明可以集成片上智能，以提供部署后的自测试、校准和信任评估功能。