SHF: Small: On-Die Learning: A Pathway to Post-Deployment Robustness and Trustworthiness of Analog/RF ICs

为了实现可靠的计算和促进技术的可信性，该项目寻求促进以成本效益的方式实现坚固可信的集成电路(IC)，特别是在模拟/射频领域。虽然制造的IC在部署之前要经过广泛的审查，以排除有缺陷或可疑的部件，但各种原因，如硅老化和不利的操作或环境条件，可能会导致以前健康的模拟/射频IC的性能不符合其设计规范。同样，隐藏功能的场激活触发器可能会导致以前受信任的模拟/射频IC表现出恶意功能。随着模拟/射频集成电路在大多数电子系统中的普及，由于无线通信、传感器应用和物联网(IoT)的快速增长，为它们配备健壮性和可信性评估机制对于它们所部署的应用来说变得至关重要。与拟议的研究相辅相成的是教育和外联活动，包括开发一个新的教育模块，为电气工程、计算机科学和应用数学等跨学科项目的研究生和本科生提供研究机会，并通过德克萨斯大学达拉斯分校德克萨斯模拟卓越中心(TxACE)组织的教程和研讨会，让当地社区成员接触模拟/射频IC的自我测试、自我校准和部署后信任评估等主题。更具体地说，该项目寻求通过集成基于机器学习的芯片监控和校准功能来增强模拟/射频IC的部署后稳健性和可信性。该项目的重点是具有成本效益的片上学习能力的集成，可通过培训来(I)确定模拟/射频IC是否符合其规范，(Ii)校准其性能，和/或(Iii)基于来自片上传感器的简单测量来检测潜在恶意电路的激活。通过设计、制造和表征两种不同的模拟/射频IC，该项目试图证明可以集成片上智能，以提供部署后自检、校准和信任评估能力。

Towards enabling reliable computing and promoting technology trustworthiness, this project seeks to facilitate cost-effective realization of robust and trusted integrated circuits (ICs), with particular emphasis in the analog/RF domain. While manufactured ICs are subjected to extensive scrutiny in order to weed out defective or suspicious parts prior to their deployment, a variety of reasons such as silicon aging and adverse operational or environmental conditions might cause the performances of a previously healthy analog/RF IC to fail its design specifications. Similarly, field-activated triggers of hidden capabilities might cause a previously trusted analog/RF IC to exhibit malicious functionality. With analog/RF ICs now prevalent in most electronic systems, due to the rapid growth of wireless communications, sensor applications, and the Internet of Things (IoT), equipping them with robustness and trustworthiness evaluation mechanisms becomes paramount to the applications wherein they are deployed. The proposed research is complemented by educational and outreach activities, including development of a new educational module, by providing opportunities for graduate and undergraduate research in interdisciplinary projects spanning Electrical Engineering, Computer Science and Applied Mathematics, as well as exposure of local community members to the topics of self-test, self-calibration, and post-deployment trust evaluation of analog/RF ICs through tutorials and seminars organized by the Texas Analog Center of Excellence (TxACE) at the University of Texas at Dallas. More specifically, this project seeks to enhance post-deployment robustness and trustworthiness of analog/RF ICs by integrating machine learning-based on-die monitoring and calibration capabilities. The key focus of this project is the cost-effective integration of on-die learning capabilities, which can be trained to (i) determine whether an analog/RF IC complies with its specifications, (ii) calibrate its performances, and/or (iii) detect the activation of potentially malicious circuitry, based on simple measurements from on-chip sensors. Through design, fabrication and characterization of two different analog/RF ICs, this project seeks to demonstrate that on-die intelligence can be integrated to provide post-deployment self-test, calibration and trust evaluation capabilities.