CISE-ANR: SHF: Small: CHAMELEON: CompreHending And Mitigating Error in AnaLog ImplEmentations of On-Die Neural Networks

CISE-ANR:SHF:小:CHAMELEON:理解并减轻片上神经网络模拟实现中的错误

基本信息

  • 批准号:
    2214934
  • 负责人:
  • 金额:
    $ 62.38万
  • 依托单位:
  • 依托单位国家:
    美国
  • 项目类别:
    Standard Grant
  • 财政年份:
    2022
  • 资助国家:
    美国
  • 起止时间:
    2022-10-01 至 2025-09-30
  • 项目状态:
    未结题

项目摘要

Considering the widespread deployment of machine-learning hardware in myriads of modern-life applications, ensuring its reliable and safe operation is crucial to advance the national prosperity and welfare and to secure the national defense. While software and/or digital hardware implementations of neural networks currently enjoy the lion’s share of the market, a number of emerging realities are necessitating the development and deployment of analog neural networks. Specifically, the exponential growth of sensory data from world-machine interfaces, known as the analog data deluge, along with the area, power consumption and response-time constraints of distributed edge-computing systems, necessitate autonomous sensing, perception, reasoning and rapid action. While analog neural-network implementations promise to deliver this ability, their robustness and reliability are susceptible to parametric differences introduced by manufacturing process variation, operational conditions variation, as well as silicon aging. Accordingly, this project seeks to enable robust and resilient operation of analog neural networks and the applications wherein they are deployed, as well as to educate the next generation of engineers on the risks and remedies of using analog machine-learning hardware.At a technical level, this project combines state-of-the-art methods for designing, testing, and calibrating analog integrating circuits, with advanced concepts from training machine-learning models, in an effort to comprehend the vulnerability of analog neural networks, develop error-mitigation solutions, and assess their effectiveness. To this end, the research activities undertaken by this project include (i) investigation and mitigation of the impact of parametric and operational differences on machine-learning models implemented as analog neural networks, (ii) development of methods for specifying and evaluating the learning capacity of such designs, and (iii) demonstration of the efficiency of the proposed methods through custom analog neural-network experimentation platforms.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
考虑到机器学习硬件在现代生活中的广泛应用,确保其可靠、安全地运行对于促进国家繁荣和福利、保障国防安全至关重要。虽然目前神经网络的软件和/或数字硬件实现享有最大的市场份额,但一些新出现的现实要求开发和部署模拟神经网络。具体地说,来自世界-机器接口的感觉数据的指数增长,即所谓的模拟数据洪流,以及分布式边缘计算系统的面积、功耗和响应时间限制,需要自主感知、感知、推理和快速行动。虽然模拟神经网络实现承诺提供这种能力,但它们的健壮性和可靠性容易受到制造工艺变化、操作条件变化以及硅老化所引入的参数差异的影响。因此,该项目旨在使模拟神经网络及其所部署的应用能够健壮而有弹性地运行,并教育下一代工程师使用模拟机器学习硬件的风险和补救措施。在技术层面,该项目将最先进的设计、测试和校准模拟集成电路的方法与来自训练机器学习模型的先进概念相结合,以努力了解模拟神经网络的脆弱性,开发错误缓解解决方案,并评估其有效性。为此,该项目开展的研究活动包括:(I)调查和缓解参数和操作差异对实施为模拟神经网络的机器学习模型的影响,(Ii)开发指定和评估此类设计的学习能力的方法,以及(Iii)通过定制的模拟神经网络实验平台演示所建议方法的效率。该奖项反映了NSF的法定使命,并通过使用基金会的智力优势和更广泛的影响审查标准进行评估,被认为值得支持。

项目成果

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Yiorgos Makris其他文献

Fast Hierarchical Test Path Construction for Circuits with DFT-Free Controller-Datapath Interface
RTL Test Justification and Propagation Analysis for Modular Designs
An Analog Checker with Input-Relative Tolerance for Duplicate Signals

Yiorgos Makris的其他文献

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{{ truncateString('Yiorgos Makris', 18)}}的其他基金

SaTC: TTP: Medium: Hardware Intellectual Property Protection through Hybrid ASIC/TRAP Integrated Circuit Design
SaTC:TTP:中:通过混合 ASIC/TRAP 集成电路设计保护硬件知识产权
  • 批准号:
    2155208
  • 财政年份:
    2022
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Standard Grant
Phase I IUCRC University of Texas at Dallas: Center for Hardware and Embedded System Security and Trust (CHEST)
第一阶段 IUCRC 德克萨斯大学达拉斯分校:硬件和嵌入式系统安全与信任中心 (CHEST)
  • 批准号:
    1916750
  • 财政年份:
    2019
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Continuing Grant
Planning IUCRC University of Texas at Dallas: Center for Hardware and Embedded System Security and Trust (CHEST)
规划 IUCRC 德克萨斯大学达拉斯分校:硬件和嵌入式系统安全与信任中心 (CHEST)
  • 批准号:
    1747773
  • 财政年份:
    2018
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Standard Grant
Student Travel Support for 2017 IEEE VLSI Test Symposium
2017 年 IEEE VLSI 测试研讨会学生旅行支持
  • 批准号:
    1735673
  • 财政年份:
    2017
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Standard Grant
Student Travel Support for 2016 IEEE VLSI Test Symposium
2016 年 IEEE VLSI 测试研讨会学生旅行支持
  • 批准号:
    1639728
  • 财政年份:
    2016
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Standard Grant
TWC: Medium: Hardware Trojans in Wireless Networks - Risks and Remedies
TWC:中:无线网络中的硬件木马 - 风险和补救措施
  • 批准号:
    1514050
  • 财政年份:
    2015
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Standard Grant
SHF: Small: On-Die Learning: A Pathway to Post-Deployment Robustness and Trustworthiness of Analog/RF ICs
SHF:小型:片上学习:实现模拟/射频 IC 部署后稳健性和可信度的途径
  • 批准号:
    1527460
  • 财政年份:
    2015
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Standard Grant
TWC: Small: Collaborative: Toward Trusted Third-Party Microprocessor Cores: A Proof Carrying Code Approach
TWC:小型:协作:走向可信的第三方微处理器核心:携带代码的证明方法
  • 批准号:
    1318860
  • 财政年份:
    2013
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Standard Grant
Cross-Layer Intelligent System-Based Adaptive Power Conditioning for Robust and Reliable Mixed-Signal Multi-Core SoCs
基于跨层智能系统的自适应功率调节,用于稳健可靠的混合信号多核 SoC
  • 批准号:
    1255754
  • 财政年份:
    2013
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Continuing Grant
TC: Small: THWART: Trojan Hardware in Wireless ICs - Analysis and Remedies for Trust
TC:小:THWART:无线 IC 中的木马硬件 - 信任分析和补救措施
  • 批准号:
    1149465
  • 财政年份:
    2011
  • 资助金额:
    $ 62.38万
  • 项目类别:
    Standard Grant

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