课题基金 / 基金详情

XPS: FULL: FP: Design and Synthesis of New Energy-efficient Self-healing Computing Electronics with Real-time Configurability

XPS: FULL: FP: Design and Synthesis of New Energy-efficient Self-healing Computing Electronics with Real-time Configurability
XPS:FULL:FP:具有实时可配置性的新型节能自愈计算电子设备的设计与合成
批准号:
1533656
负责人:
Jie Gu
金额:
$54.86万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2015
资助国家:
美国
项目状态:
已结题
起止时间:
2015-09-01 至 2019-08-31

项目摘要

项目成果

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中文摘要
翻译
在过去的十年中,现代以数据为中心的计算系统的能耗和材料成本一直在快速增长。 不幸的是,大量的能量和材料费用被浪费,以创建足够的公差制造缺陷,工艺变化,可靠性下降,等作为技术缩放变得昂贵,这是非常可取的,以开发一种新的计算机系统与实时可重构性,以科普来自制造和用户需求的变化。 不幸的是,传统的CMOS技术没有为我们提供这样的能力,因为一旦集成电路被制造,它就不能再被修改。 然而,非易失性存储器器件的最近发展,特别是新兴的忆阻器器件,已经为具有实时可重构性的新设计范例打开了大门。的实时可调性、大的开关电阻比和CMOS工艺兼容性,探索了一种新的具有实时可重构性的大规模集成电路设计与综合方法。 通过智能地将基于新型忆阻器器件的自愈电路与检测和调谐功能集成,新的计算机系统可以执行实时调整而无需分配大量的设计裕度,从而实现显著的能量和成本节约。 考虑到这一点,该项目将执行(1)忆阻器集成VLSI和混合信号设计的器件级建模和设计套件开发,(2)电路级设计,以创建强大的自愈数字和混合信号系统,以及(3)设计自动化开发,以实现拟议的可重构设计方法的大规模集成。 为了更广泛的影响,该项目提供了一个独特的培训机会,让学生获得广泛的知识基础和开箱即用的思维能力,通过这个项目中的跨层研究活动。 开发的设计工具包和方法将提供给社区,以激发创新的VLSI和混合信号电路设计与忆阻器设备。
英文摘要
The energy consumption and material cost for modern data-centric computing systems have been rapidly expanding over the past decade. Unfortunately, a significant amount of the energy and material expense is being wasted to create enough tolerance to manufacturing defects, process variation, reliability degradation, etc. As the technology scaling is becoming prohibitively expensive, it is highly desirable to develop a novel computer system with real-time reconfigurability to cope with the variability stemming from both manufacturing and user demand. Unfortunately, conventional CMOS technology has not provided us such a capability because once an integrated circuit is fabricated, it can no longer be modified. However, the very recent development of non-volatile memory devices, specially the emerging memristor device, have opened the door for a new design paradigm with real-time reconfigurability.Leveraging the memristor?s real-time tunability, large on-off resistive ratio and CMOS process compatibility, this project explores a new design and synthesis methodology of large scale integrated circuits with real-time reconfigurability. By intelligently integrating novel memristor device based self-healing circuits with detection and tuning functionalities, a new computer system can perform real-time adjustment without allocating a large amount of design margin and thus achieve significant energy and cost saving. With this in mind, this project will perform (1) device level modeling and design kit development for memristor integrated VLSI and mixed-signal design, (2) circuit level design to create robust self-healing digital and mixed-signal system, and (3) design automation development to enable large scale integration of the proposed reconfigurable design methodology. For broader impact, the project provides a unique training opportunity to the students to obtain a broad knowledge base and out-of-box thinking capability through the cross-layer research activity in this project. The developed design kit and methodology will be available to the community to inspire innovative VLSI and mixed-signal circuit design with memristor devices.
期刊论文(15)
专著(0)
科研奖励(0)
会议论文
DOI: 10.23919/date.2018.8341984
发表时间: 2018-04
期刊: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)
影响因子: --
作者: [Amin Rezaei;Yuanqi Shen;Shuyu Kong;Jie Gu;H. Zhou]
通讯作者: Amin Rezaei;Yuanqi Shen;Shuyu Kong;Jie Gu;H. Zhou
SigAttack: New High-level SAT-based Attack on Logic Encryptions
SigAttack:针对逻辑加密的新的基于 SAT 的高级攻击
DOI: 10.23919/date.2019.8714924
发表时间: 2019
期刊: Testing in Europe (DATE
影响因子: --
作者: [Shen, Yuanqi, Li, You, Kong, Shuyu, Rezaei, Amin, Zhou, Hai]
通讯作者: Zhou, Hai
Design and Synthesis of Self-Healing Memristive Circuits for Timing Resilient Processor Design
用于定时弹性处理器设计的自愈忆阻电路的设计和综合
DOI: 10.1109/tvlsi.2018.2834827
发表时间: 2018
期刊: IEEE Transactions on Very Large Scale Integration (VLSI
影响因子: --
作者: [Kong, Shuyu, Zhou, Hai, Gu, Jie]
通讯作者: Gu, Jie
BeSAT: behavioral SAT-based attack on cyclic logic encryption
BeSAT:针对循环逻辑加密的基于行为 SAT 的攻击
DOI: 10.1145/3287624.3287670
发表时间: 2019
期刊: Asia and South Pacific Design Automation Conference
影响因子: --
作者: [Shen, Yuanqi, Li, You, Rezaei, Amin, Kong, Shuyu, Dlott, David, Zhou, Hai]
通讯作者: Zhou, Hai
共 15 条
    Collaborative Research: CMOS+X: A Device-to-Architecture Co-development and Demonstration of Large-scale Integration of FeFET on CMOS for Emerging Computing Applications
    • 批准号:
      2318807
    • 项目类别:
      Standard Grant
    • 资助金额:
      $38.5万
    • 财政年份:
      2023
    • 负责人:
      Jie Gu
    • 依托单位:
    SHF: Small: A Chip of Happiness: Device-to-System Developments of Affective Computing for Human-in-the-loop Computer System
    • 批准号:
      2208573
    • 项目类别:
      Standard Grant
    • 资助金额:
      $60.0万
    • 财政年份:
      2022
    • 负责人:
      Jie Gu
    • 依托单位:
    SHF: Small: Development of Differentiable Memory Augmented Neural CPU Architecture for Cognitive Computing
    • 批准号:
      2008906
    • 项目类别:
      Standard Grant
    • 资助金额:
      $50.0万
    • 财政年份:
      2020
    • 负责人:
      Jie Gu
    • 依托单位:
    CAREER: Design and Synthesis of Energy-efficient Time-domain Computing for Intelligent Edge Processing
    • 批准号:
      1846424
    • 项目类别:
      Continuing Grant
    • 资助金额:
      $100.0万
    • 财政年份:
      2019
    • 负责人:
      Jie Gu
    • 依托单位:
    国内基金
    海外基金
    钴基Full-Heusler合金的掺杂效应和薄膜噪声特性研究
    • 批准号:
      51871067
    • 项目类别:
      面上项目
    • 资助金额:
      60.0万元
    • 批准年份:
      2018
    • 负责人:
      吴晟
    • 依托单位: